Using Presilicon Knowledge to Excite Nonlinear Failure Modes in Large Mixed-Signal Circuits

Abstract

h WITH THE CONTINUED scaling of CMOS technology, the complexity of analog/mixed-signal design has grown over time. Along with bigger and more complex circuits, we are forced to deal with increasing design uncertainties such as startup conditions; signal and power noise; and process variation. Slight parametric shifts in analog components can cause the output to change significantly in such a scenario. More importantly, multiple parameters may interact nonlinearly to cause out-of-specification failures. Detecting such out-ofspecification failure mechanisms in the presilicon domain [1] helps, but presilicon assumptions about design uncertainty may not be entirely accurate.Moreover, downstream effects of out-ofspecification failures on system-level performance are not always known, making postsilicon testing of such failure mechanisms critical.It is impossible to test for functional failures under every possible input and parametric variation, making design for test (DfT) indispensable. Identifying what parameters to control, and what values to excite, is especially difficult in highdimensional, highly nonlinear systems since linearity and worst case corner assumptions no longer apply. Traditional sensitivity-based approaches find it difficult to scale as a result. We instead start with prior work on identifying presilicon failure mechanisms [1] and demonstrate a novel way to excite these failure mechanisms. More specifically, the contributions made in this work are twofold.1) We develop an information-theoretic parameter ranking scheme to assist with design-for-test decisions. This parameter ranking is only meant to serve as a guide, as designer intervention is still required for the actual design of test structures. 2) We then demonstrate how a test set can be selected to maximize the probability of observing out-of-specification failures. This holds true even when dealing with limited designfor-test budgets as demonstrated on a highdimensional phase-locked loop test case.

Automatic Design of a Broadband Directional Coupler via Bayesian Optimization

“…In [140], Gibbs sampling is used to estimate the rare failure rate. In [145], the authors develop a test-set selection method to best use presilicon knowledge and an information-theory-based parameter ranking scheme to maximize the probability of observing postsilicon failures. In [144], the authors propose to use Bayesian optimization equipped with a novel acquisition function to effectively retrieve the worst-case rare performance.…”