Proceedings of the 2014 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays 2014
DOI: 10.1145/2554688.2554759
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Using high-level synthesis and formal analysis to predict and preempt attacks on industrial control systems

Abstract: Industrial control systems (ICSes) have the conflicting requirements of security and network access. In the event of large-scale hostilities, factories and infrastructure would more likely be targeted by computer viruses than the bomber squadrons used in WWII. ICS zero-day exploits are now a commodity sold on brokerages to interested parties including nations. We mitigate these threats not by bolstering perimeter security, but rather by assuming that potentially all layers of ICS software have already been com… Show more

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Cited by 6 publications
(1 citation statement)
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“…The authors utilized semi-automatic co-verification methodology using a toolchain comprised of Boogie [34] as intermediate verification language, through Corral software verifier [160] and SMACK [210] for bit-precise checking with an ultimate goal of producing secure SoCs. The author of [165] consider that all software layers could be compromised and have developed an application specific hardware monitor based on a formally analysed C code and a junction box validated in a hardware description language with a goal to monitor the hardware controller for malicious activity. The authors model their hardware monitor in Frama-C [76] with Jessie plugin, allowing for automatic deductive verification using Why [98].…”
Section: Industrialmentioning
confidence: 99%
“…The authors utilized semi-automatic co-verification methodology using a toolchain comprised of Boogie [34] as intermediate verification language, through Corral software verifier [160] and SMACK [210] for bit-precise checking with an ultimate goal of producing secure SoCs. The author of [165] consider that all software layers could be compromised and have developed an application specific hardware monitor based on a formally analysed C code and a junction box validated in a hardware description language with a goal to monitor the hardware controller for malicious activity. The authors model their hardware monitor in Frama-C [76] with Jessie plugin, allowing for automatic deductive verification using Why [98].…”
Section: Industrialmentioning
confidence: 99%