Using hardware multithreading to overcome broadcast/reduction latency in an associative SIMD processor

Schaffer, Kevin; Walker, Robert A.

doi:10.1109/ipdps.2008.4536349

Cited by 1 publication

(1 citation statement)

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“…The key to AP hardware design is [53,54,55,52]: 1) high memory-to-PE bandwidth, and 2) low level synchronous operation supported by the i) elimination of branches in low level loops, and ii) the elimination of low level barrier synchronism. In the STARAN and the ASPRO, these abilities were supported by corner turning the data and assigning one record per processor, the multi-dimensional array memory (and flip network) and mask register hardware.…”

Section: Ap Propertiesmentioning

confidence: 99%

Comparisons of air traffic control implementations on an associative processor with a MIMD and consequences for parallel computing

Yuan¹,

Baker²,

Meilander³

2013

Journal of Parallel and Distributed Computing

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This paper has two complementary focuses. The first is the system design and algorithmic development for air traffic control (ATC) using an associative SIMD processor (AP). The second is the comparison of this implementation with a multiprocessor implementation and the implications of these comparisons. This paper demonstrates how one application, ATC, can more easily, more simply, and more efficiently be implemented on an AP than is generally possible on other types of traditional hardware. The AP implementation of ATC will take advantage of its deterministic hardware to use static scheduling. The software will be dramatically smaller and cheaper to create and maintain. Likewise, a large AP system will be considerably simpler and cheaper than the MIMD hardware currently used. While APs were used for ATC-type applications earlier, these are no longer available. We use a ClearSpeed CSX600 accelerator to emulate the AP solutions of ATC on an ATC prototype consisting of eight data-intensive ATC real-time tasks. Its performance is compared with an 8-core multiprocessor (MP) using OpenMP. Our extensive experiments show that the AP implementation meets all deadlines while the MP will regularly miss a large number of deadlines. The AP code will be similar in size to sequential code for the same tasks and will avoid all of the additional support software needed with an MP to handle dynamic scheduling, load balancing, shared resource management, race conditions, * Corresponding author Email addresses: myuan@cs.kent.edu (Man(Mike) Yuan), jbaker@cs.kent.edu (Johnnie W. Baker), wllcm@att.net (Will C. Meilander) 1 This is the first author footnote. Preprint submitted to Journal of Parallel and Distributed Computing August 15, 2012false sharing, etc. At this point, essentially only MIMD systems are built. Many of the advantages of using an AP to solve an ATC problem would carry over to other applications. AP solutions for a wide variety of applications will be cited in this paper. Applications that involve a high degree of data parallelism such as database management, text processing, image processing, graph processing, bioinformatics, weather modeling, managing UAS (Unmanned Aircraft Systems or drones) etc, are good candidates for AP solutions. This raises the issue of whether we should routinely consider using non-multiprocessor hardware like the AP for applications where substantially simpler software solutions will normally exist. It also raises the question of whether the use of both AP and MIMD hardware in the same system could provide more versatility and efficiency. Either the AP or MIMD could serve as the primary system but could hand off jobs it could not handle efficiently to the other system.

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Section: Ap Propertiesmentioning

confidence: 99%