Using Error Modes Aware LDPC to Improve Decoding Performance of 3-D TLC NAND Flash

Wu, Fei; Zhang, Meng; Du, Yajuan; Lu, Zuo; Wan, Jiguang; Tan, Zhihu; Xie, Changsheng

doi:10.1109/tcad.2019.2897706

Cited by 28 publications

(4 citation statements)

References 34 publications

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“…For example, the lifetime is determined by the worst-case RBER. Among the three pages of 3D TLC NAND, CSB page is treated as the page that has the highest RBER [32,33]. However, based on our study, the MSB page has the highest RBER in some normal usage at room temperature.…”

Section: Discussionmentioning

confidence: 76%

“…At the same time, the reliability of SSDs and their data endurance over the years are always of great concern [6,21,23,24]. The raw bit error rate (RBER) of SSDs' 3D NAND flash-memory chips is dominated by retention errors [4,5,32], which are caused by the charge leakage of flash cells over retention time. The understanding of the RBER and retention loss has huge impacts on not only the lifetime, but also on the access performance of a flash-memory chip.…”

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

“…Many previous studies have conducted experiments to characterize the performance and reliability features of planar and 3D NAND flash and make meticulous analyses [23,26,32,33]. It is a common practice to understand the flash retention errors through high-temperature baking processes [2,3,7,32,33]. According to Arrhenius' model [2,3,19,28], the retention loss process can be accelerated through baking since high temperatures increase the mobility of electrons in flash cells, which accelerates the charge leakage speed.…”

Section: Introductionmentioning

confidence: 99%

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How the common retention acceleration method of 3D NAND flash memory goes wrong?

Kuo

2021

Proceedings of the 13th ACM Workshop on Hot Topics in Storage and File Systems

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The reliability of solid-state drives (SSDs) has become increasingly important as SSDs are now widely applied in data centers. Retention error is a major source of impact on the reliability of SSDs. Even though the common practice in understanding the retention errors of an SSD is done by high-temperature baking processes, their characterization accuracy is not yet rigidly reviewed. In this paper, we first present how the common retention acceleration method goes wrong. Through a one-year study of 3D flash error behaviors, we found that the retention errors through baking with high temperatures have very different characteristics from the real long-retention errors. These differences come from the inherent structure and the materials of 3D NAND flash. Several findings regarding the retention errors characterized through baking are presented, followed by the analysis of the error behaviors. Finally, the retention errors of one year on 3D flash memory are provided with real data.

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Section: Discussionmentioning

confidence: 76%