2015
DOI: 10.1007/978-3-662-46681-0_62
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Using a Formal Model to Improve Verification of a Cache-Coherent System-on-Chip

Abstract: International audienceIn this paper we report about a case study on the functional verification of a System-on-Chip (SoC) with a formal system-level model. Our approach improves industrial simulation-based verification techniques in two aspects. First, we suggest to use the formal model to assess the sanity of an interface verification unit. Second, we present a two-step approach to generate clever semi-directed test cases from temporal logic properties: model-based testing tools of the CADP toolbox generate s… Show more

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Cited by 5 publications
(5 citation statements)
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References 19 publications
(25 reference statements)
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“…Among the case studies listed on the CADP web site, the tools are most frequently used for the formal specification and modeling of a system, which are then verified by model checking temporal logic properties and/or equivalence checking against a reference model (e.g., the expected service of a protocol). Some case studies additionally take advantage of more specific tools, e.g., for performance evaluation [18,3,11,7,9,14,45,55], (conformance) test generation [33,12,28,51,54,8,29,41,35,5], or generation of an executable prototype from the formal model [12,28,53,27,41,52,26].…”
Section: αFm: How Can the Approach Be Applied In Practice?mentioning
confidence: 99%
See 1 more Smart Citation
“…Among the case studies listed on the CADP web site, the tools are most frequently used for the formal specification and modeling of a system, which are then verified by model checking temporal logic properties and/or equivalence checking against a reference model (e.g., the expected service of a protocol). Some case studies additionally take advantage of more specific tools, e.g., for performance evaluation [18,3,11,7,9,14,45,55], (conformance) test generation [33,12,28,51,54,8,29,41,35,5], or generation of an executable prototype from the formal model [12,28,53,27,41,52,26].…”
Section: αFm: How Can the Approach Be Applied In Practice?mentioning
confidence: 99%
“…In the context of semicomposition [34], the EXP.OPEN tool [36] can automatically compute behavioral interfaces [37] and check the correctness of manually provided ones. Taking advantage of the integration of shell commands in SVL, CEGAR (Counter-Example Guided Abstraction Refinement)-style loops have been used to automatically reduce the model [35].…”
Section: Automation αFm: Which Tool Support Is Proposed? If Abstraction Is Needed How Is It Automated?mentioning
confidence: 99%
“…The first two have been kindly provided by Alexander Graf-Brill, and correspond to initial versions of TPs for his EnergyBus model [20]; both aim at exhibiting a particular boot sequence, the second one using REFUSE transitions. The next four examples have been used by STMicroelectronics to verify a cache-coherence protocol [27]. The last three correspond to the three TPs presented in Sect.…”
Section: Experimental Evaluationmentioning
confidence: 99%
“…The theory underlying ioco is well established, implemented in several tools [1,2,22,25,28], and still actively used, as witnessed by a series of recent case studies [9,10,20,27,38].…”
Section: Introductionmentioning
confidence: 99%
“…The proposed formalization and validation approach is used by the industry to validate specific networking protocols to deal with complex behaviors that cannot be proven by classical test and simulation approaches [18], [19].…”
Section: Related Workmentioning
confidence: 99%