Use of the polysilicon gate layer for local interconnect in a CMOS technology incorporating LDD structures

The current status of commercial low-temperature silicon epitaxy

“…In the area of local interconnect, patterned polysilicon deposition (either doped or undoped) to define the local interconnection can be used as a silicon seed for silicidation, as reported by EI-Diwany et al, or SEG to build up the poly and achieve localized strapping and interconnection. 33 …”