USB FIFO interface for FPGA based DAQ applications

Mroczek, Krzysztof

doi:10.1109/idaacs.2015.7341387

Cited by 3 publications

(1 citation statement)

References 5 publications

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“…The FT232H was configured the synchronous FT245 FIFO mode and store the information in the chip. The test data (0x10101010) was read from the read FIFO of the FT232H to the dual-port RAM, and then reads the test data from the RAM to the write FIFO to achieve USB bidirectional communication [14]. The upper computer monitored the test process and recorded results.…”

Section: Test Hardware Systemmentioning

confidence: 99%

Single event effect evaluation of different communication ways based on 40nm SRAM-FPGA

Zhao

et al. 2023

Third International Conference on Artificial Intelligence and Computer Engineering (ICAICE 2022)

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Field-programmable gate array (FPGA) is now considered by an increasing number of designers in various fields of application, such as space and aircraft embedded control systems, image and signal processing. It is a popular way to design different serial communication protocols including serial and network communications implemented by FPGA, which ensure data transfer accuracy and timing. However, single event effects (SEE) can pose a serious threat to the reliability of FPGA in the radiation environments. In order to evaluate the reliability and failure modes of different communication interfaces in radiation environments, three communication protocols were tested by alpha radiation source, including universal asynchronous receiver/transmitter (UART), ethernet, and universal serial bus (USB). The experiments have presented the failure modes and SEE cross sections to different communication ways.

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Section: Test Hardware Systemmentioning

confidence: 99%