Unleashing the performance of ccNUMA multiprocessor architectures in heterogeneous stencil computations

Abstract

This paper meets the challenge of harnessing the heterogeneous communication architecture of ccNUMA multiprocessors for heterogeneous stencil computations, an important example of which is the Multidimensional Positive Definite Advection Transport Algorithm (MPDATA). We propose a method for optimization of parallel implementation of heterogeneous stencil computations that is a combination of the islands-of-core strategy and (3+1)D decomposition. The method allows a flexible management of the trade-off between computation and communication costs in accordance with features of modern ccNUMA architectures. Its efficiency is demonstrated for the implementation of MPDATA on the SGI UV 2000 and UV 3000 servers, as well as for 2-and 4-socket ccNUMA platforms based on various Intel CPU architectures, including Skylake, Broadwell, and Haswell.

Architectural Adaptation and Performance-Energy Optimization for CFD Application on AMD EPYC Rome

“…As a result, the relatively low operational intensity of each MPDATA kernel [4] is not high enough to efficiently utilize the resources of modern processors. In our works [4], [11], [21], [35], [38], a set of optimizations was developed to exploit resources of multicore ccNUMA/SMP systems more efficiently. The resulting parallelization methodology consists of the following parametric optimization steps: [21] -this step explores spatial blocking across the different kernels, employing overlapped tiling with redundant computations, while all kernels are grouped into five packages using loop fusion.…”

“…Through this die, a given CCD can communicate with other CCDs and the main memory, as well as with external devices connected by the PCIe bus. As a result, the EPYC 7742 CPU can provide one NUMA domain for a single processor, which is equivalent to the NUMA layout offered by current Intel Xeon CPUs [35]. This mode is known as NPS1 [5].…”

Correlation of Performance Optimizations and Energy Consumption for Stencil-Based Application on Intel Xeon Scalable Processors

“…The next optimization step (version C) fits perfectly into multi-socket architectures [36], [42]. As shown in Fig.…”

“…To alleviate the memory-bound nature of MPDATA, we developed [9], [36], [37], [38] a parallelization methodology for MPDATA heterogeneous stencil computations. It contributes to ease the memory and communication bounds, and exploits resources of multicore ccNUMA/SMP systems better.…”

“…Partitioning cores into independent work teams ( [36])this step enables the flexible management of trade-off between costs of computation and communication, following features of ccNUMA systems. As a result, two scenarios of executing MPDATA kernels are introduced: the first one performs fewer computations but requires more data traffic, while the second scenario allows us to replace the implicit data traffic by replicating some of the computations.…”