Universal Platform for Scalable Semiconductor‐Superconductor Nanowire Networks

Abstract

Semiconductor-superconductor hybrids are commonly used in research on topological quantum computation. Traditionally, top-down approaches involving dry or wet etching are used to define the device geometry. These often aggressive processes risk causing damage to material surfaces, giving rise to scattering sites particularly problematic for quantum applications. Here, a method that maintains the flexibility and scalability of selective area grown nanowire networks while omitting the necessity of etching to create hybrid segments is proposed. Instead, it takes advantage of directional growth methods and uses bottom-up grown indium phosphide (InP) structures as shadowing objects to obtain selective metal deposition. The ability to lithographically define the position and area of these objects and to grow a predefined height ensures precise control of the shadowed region. The approach by growing indium antimonide nanowire networks with welldefined aluminium and lead (Pb) islands is demonstrated. Cross-section cuts of the nanowires reveal a sharp, oxide-free interface between semiconductor and superconductor. By growing InP structures on both sides of in-plane nanowires, a combination of platinum and Pb can independently be shadow deposited, enabling a scalable and reproducible in situ device fabrication. The semiconductor-superconductor nanostructures resulting from this approach are at the forefront of material development for Majorana based experiments.

Electronic Transport and Quantum Phenomena in Nanowires

“…The use of nanowalls as shadowing objects, however, has been mainly developed for the device chip (Figure h–j). In particular, the nanowire is transferred or grown in-plane next to a wall on the device chip prior to the shadow deposition, such that after the superconductor deposition the device is complete and no further fabrication steps are required ,, . The elimination of fabrication steps in hybrid devices using transferred VLS nanowires in combination with shadow-wall deposition have yielded significant improvements in transport properties, device quality, and reproducibility , .…”

Selective area growth of in-plane InAs nanowires and nanowire networks on Si substrates by molecular-beam epitaxy

“…Selective area epitaxy (SAE) is one of the most important methods for in-plane nanowires and nanowire networks growth because it enables the density, position, diameter and pattern of openings to be well controlled to produce various in-plane nanostructure arrays [16][17][18][19][20]. To date, SAE has been used in different epitaxial growth-techniques such as metal organic chemical vapor deposition, chemical beam epitaxy and molecular-beam epitaxy (MBE) [21][22][23]. Among them, MBE-SAE technique has unique advantages due to its ultrahigh source purity, ultra-high vacuum growth condition and low growth temperature.…”

Direct growth of crystalline SiGe nanowires on superconducting NbTiN thin films

“…For example, Josephson junctions enable many applications by developing semiconductorsuperconductor hybrid structures. Moreover, recent progress in quantum computing, quantum sensing, and cryogenic electronics has shown that semiconductor-superconductor hybrid structures are needed for artificial intelligence, enhanced sensor performance, next-generation computing, signal processing, and quantum optoelectronic devices [1][2][3][4][5][6][7][8].…”