Unibond(R) SOI wafers for ultra-thin films applications

Maleville, Christophe; Neyret, E.; Ecarnot, Ludovic; Arene, E.; Barge, T.; Auberton, A.J.

doi:10.1109/soic.2001.958033

Cited by 2 publications

(2 citation statements)

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“…They concluded that a kiloelectronvolt range hydrogen implant is infeasible for layer transfer. Maleville et al [19] reports 70-nm top Si SOI using touch polishing of an initial 500-nm layer. Srikrishnan [20] forms (by implantation) an etch stop layer inside of the transferred with Smart-Cut silicon film with a subsequent etching.…”

Section: Introductionmentioning

confidence: 99%

Transfer of Single Crystalline Silicon Nanolayer Onto Alien Substrate

Usenko¹,

Carr

Chen

2004

IEEE Trans. Nanotechnology

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Starting from the 60-nm node, future generations of mainstream semiconductor devices (i.e., CMOS) will be mostly manufactured from silicon-on-insulator (SOI) initial substrates with the top silicon layer having a thickness 50 nm or less. We describe a process that is capable for transfer of nanoscale thick layers. The layer is delaminated from a single crystalline silicon substrate and laminated onto another substrate, thus resulting in SOI. The process includes: 1) forming a trap layer for hydrogen in an initial substrate; 2) delivery of hydrogen to the traps by diffusion of monatomic hydrogen; 3) evolving the trapped hydrogen into a layer of hydrogen platelets; 4) stiffening of the surface of the initial substrate by laminating to another substrate; and 5) delaminating a layer from the initial substrate along the hydrogen platelet layer. Details of the new layer transfer process are described. A depth where the buried trap layer locates is critical for the process. An implantation of heavy ions is used to form the trap layer. A trap capacity for hydrogen is evaluated as a function of implantation conditions. Plasma hydrogenation is used to deliver atomic hydrogen to the traps. Electron cyclotron resonance, microwave, RF, and dc plasma are compared as the hydrogenation sources. Dependence of a thickness of a transferred layer as a function of the mass of implanted ions and implantation energy is described. Types of layer transfer faults are also described. Mechanisms of the layer transfer faults are suggested. We discuss limits of scaling down of the thickness of the layer that is transferred from one substrate to another. The scaling limit of our process is compared to the limits of other (SIMOX, Smart-Cut, and ELTRAN) processes.

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Section: Introductionmentioning

confidence: 99%

Transfer of Single Crystalline Silicon Nanolayer Onto Alien Substrate

Usenko¹,

Carr

Chen

2004

IEEE Trans. Nanotechnology

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“…When the energy of the H implant is reduced below 20 keV to achieve thin delaminating thickness, problems arise. Maleville et al 20 reports 70-nm, top-Si SOI using touch polishing of an initial 500-nm layer. Qian et al 7 and Qian and Terreault 18,19 used low-energy hydrogen implantation (5-8 keV) in a regular Smart-Cut to get a thinner top SOI layer.…”

Section: Introductionmentioning

confidence: 99%

Layer-transfer process for silicon-on-insulator with improved manufacturability

Usenko¹

2003

Journal of Elec Materi

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Unibond(R) SOI wafers for ultra-thin films applications

Cited by 2 publications

References 0 publications

Transfer of Single Crystalline Silicon Nanolayer Onto Alien Substrate

Transfer of Single Crystalline Silicon Nanolayer Onto Alien Substrate

Layer-transfer process for silicon-on-insulator with improved manufacturability

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