Uniaxial-process-induced strained-Si: extending the CMOS roadmap

Thompson, Scott E.; Sun, Guangyu; Choi, Y. S.; Nishida, Toshikazu

doi:10.1109/ted.2006.872088

Cited by 562 publications

(274 citation statements)

References 47 publications

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“…Raman measurements indicated a positive strain of ε = 0.8% in the SSOI layer. Electron beam lithography and reactive ion etching using low-energy SF 6 -based plasma were employed to define the dumbbell bridges with different dimensions oriented along the [110] crystal direction. The electron beam lithography resist was removed using Piranha solution.…”

Section: Methodsmentioning

confidence: 99%

“…Because the dimensions of current scaled transistors are becoming smaller than the required thickness of such an overlayer, it is difficult to implement this approach into smaller nodes while providing uniaxial tensile stress higher than the presently obtained ~2 GPa (corresponding to ~1.2% strain) 4,6 . Indeed, the integration of strain levels higher than those currently available into silicon NWs is recognized as a major milestone for the front end silicon technology at smaller nodes 7 .…”

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confidence: 99%

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Top-down fabricated silicon nanowires under tensile elastic strain up to 4.5%

et al. 2012

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strained si nanowires are among the most promising transistor structures for implementation in very large-scale integration due to of their superior electrostatic control and enhanced transport properties. Realizing even higher strain levels within such nanowires are thus one of the current challenges in microelectronics. Here we achieve 4.5% of elastic strain (7.6 GPa uniaxial tensile stress) in 30 nm wide si nanowires, which considerably exceeds the limit that can be obtained using siGe-based virtual substrates. our approach is based on strain accumulation mechanisms in suspended dumbbell-shaped bridges patterned on strained si-on-insulator, and is compatible with complementary metal oxide semiconductor fabrication. Potentially, this method can be applied to any tensile prestrained layer, provided the layer can be released from the substrate, enabling the fabrication of a variety of strained semiconductors with unique properties for applications in nanoelectronics, photonics and photovoltaics. This method also opens up opportunities for research on strained materials.

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Section: Methodsmentioning

confidence: 99%

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confidence: 99%

Top-down fabricated silicon nanowires under tensile elastic strain up to 4.5%

et al. 2012

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“…1, 2 Straining silicon considerably increases the mobility of carriers, either electrons or holes, leading to significantly enhanced performances in metal-oxide-semiconductor fieldeffect transistors ͑MOSFETs͒. [3][4][5] Different techniques have been investigated to engineer strain in devices, for example the growth of relaxed virtual substrates to induce biaxial strain in the channel region, or the capping of transistors with a specially engineered high tensile stress silicon nitride layer to induce uniaxial tensile strain. 6,7 The most widely reported technique, however, is to use recessed Si 1−x Ge x or Si 1−y C y sources and drains as stressors for compressive strain in p-MOSFETs 8 and tensile strain in n-MOSFETs, 9,10 respectively.…”

mentioning

confidence: 99%

Strain mapping of tensiley strained silicon transistors with embedded Si1−yCy source and drain by dark-field holography

Hüe

Hÿtch

Houdellier

et al. 2009

Applied Physics Letters

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Dark-field holography, a new transmission electron microscopy technique for mapping strain distributions at the nanoscale, is used to characterize strained-silicon n-type transistors with a channel width of 65 nm. The strain in the channel region, which enhances electron mobilities, is engineered by recessed Si0.99C0.01 source and drain stressors. The strain distribution is measured across an array of five transistors over a total area of 1.6 μm wide. The longitudinal tensile strain reaches a maximum of 0.58%±0.02% under the gate oxide. Theoretical strain maps obtained by finite element method agree well with the experimental results.

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“…Strain can significantly modify the electronic band structures of a material [1][2][3], thus it can have strong effects on the structural, electrical and optical properties of the material [4][5][6]. Because of this, it has been extensive studied both theoretically and experimentally in the past decades and has often been used in designing electronic devices to enhance the device performance.…”

Section: Unusual Nonlinear Strain Dependence Of Valance-band Splittinmentioning

confidence: 99%