2021
DOI: 10.1002/solr.202100523
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Understanding the Role of CdTe in Polycrystalline CdSexTe1–x/CdTe‐Graded Bilayer Photovoltaic Devices

Abstract: Grading of bandgap by alloying CdTe with selenium to form a CdSe x Te1–x /CdTe‐graded bilayer device has led to a device efficiency over 19%. A CdSe x Te1–x absorber would increase the short‐circuit current due to its lower bandgap but at the expense of open‐circuit voltage. It has been demonstrated that adding a CdTe layer at the back of such a CdSe x Te1–x film reduces the voltage deficit caused by the lower bandgap of absorber from selenium alloying while maintaining the higher short‐circuit current. This… Show more

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Cited by 10 publications
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“…In order to overcome the factors limiting the performance of the solar cells with Cd(Se,Te) interlayer, the studies were concentrated on the optimization of fabrication conditions such as their thickness, the effect of Cu doping on them, minority carrier lifetime, defect structure, CdCl 2 treatment, etc [9][10][11][12][13][14][15]. Among the existing conditions of fabrication, substrate temperature (ST) is an important parameter because it directly affects phase formation, grain size and conductivity of the CdSe and/or CdTe films as well as the quality of the interface at the CdSe/CdTe or Cd(Se,Te)/CdTe stacks [16][17][18][19].…”
Section: Introductionmentioning
confidence: 99%
“…In order to overcome the factors limiting the performance of the solar cells with Cd(Se,Te) interlayer, the studies were concentrated on the optimization of fabrication conditions such as their thickness, the effect of Cu doping on them, minority carrier lifetime, defect structure, CdCl 2 treatment, etc [9][10][11][12][13][14][15]. Among the existing conditions of fabrication, substrate temperature (ST) is an important parameter because it directly affects phase formation, grain size and conductivity of the CdSe and/or CdTe films as well as the quality of the interface at the CdSe/CdTe or Cd(Se,Te)/CdTe stacks [16][17][18][19].…”
Section: Introductionmentioning
confidence: 99%
“…MZO and CdSe x Te 1-x (CdSeTe) improve the carrier collection at short and long wavelength, respectively [6] maximizing the short-circuit current density (J SC ), currently exceeding 30 mA/cm 2 [9]. The graded absorber bilayer, CdSe x Te 1-x /CdTe, is necessary to maintain simultaneously high values of open-circuit voltage and short-circuit current [10]. Despite this improvements the open circuit voltage remain below 900 mV far from the detailed-balance value of 1.156 V [11].…”
Section: Introductionmentioning
confidence: 99%