2018
DOI: 10.1088/1674-4926/39/10/104006
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Ultralow specific ON-resistance high-k LDMOS with vertical field plate

Abstract: An ultralow specific on-resistance high-k LDMOS with vertical field plate (VFP HK LDMOS) is proposed. The high-k dielectric trench and highly doped interface N+ layer are made in bulk silicon to reduce the surface field of the drift region in the VFP HK LDMOS. The gate vertical field plate (VFP) pinning in the high-k dielectric trench can modulate the bulk electric field. The high-k dielectric not only provides polarized charges to assist depletion of the drift region, so that the drift region and high-k trenc… Show more

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Cited by 2 publications
(1 citation statement)
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“…There are more electrons attached to the gates in the on-state, making R on,sp lower. Reference [21] proposed a field plate with highly doped N-layer beneath the oxide trench, which formed two electron accumulation layers in the on-state. Also, [22] proposed a novel multi-dimensional accumulation gate to attract more electrons, which very effectively reduced R on,sp .…”
Section: Device Structure and Principlementioning
confidence: 99%
“…There are more electrons attached to the gates in the on-state, making R on,sp lower. Reference [21] proposed a field plate with highly doped N-layer beneath the oxide trench, which formed two electron accumulation layers in the on-state. Also, [22] proposed a novel multi-dimensional accumulation gate to attract more electrons, which very effectively reduced R on,sp .…”
Section: Device Structure and Principlementioning
confidence: 99%