Ultralow Set Voltage and Enhanced Switching Reliability for Resistive Random-Access Memory Enabled by an Electrodeposited Nanocone Array

Abstract

Resistive random-access memory (RRAM) has been extensively investigated for 20 years due to its excellent advantages, including scalability, switching speed, compatibility with the complementary metal oxide semiconductor process, and neuromorphic computing application. However, the issue of memristor reliability for cycle to cycle and device to device resulting from the random ion drift and diffusion in solid-state thin films is still a great challenge for commercialization. Therefore, controlling the internal ionic process to improve the memristor performance and reliability is a primary and urgent task. Here, a Ni nanocone array prepared by an electrodeposition method is integrated with an Ag/Al2O3/Pt resistive switching device. The nanocone-array-based memristor yields superior switching performance, including an ultralow set voltage (−0.37 V), a concentrated voltage/resistance distribution (C V 14.8%/32.7%), robust endurance (>105 cycles), and multilevel storage capability. A finite element analysis, transmission electron microscope observation, and current mapping test indicate that the local enhancement of the electric field confines the ionic migration process and yields a predictable formation and dissolution process of the conductive filament. The nanocone-array-based RRAM device provides a new and feasible method to control the conductive filament growth reliably, which paves the way for memristor development.

Memory and Synaptic Devices Based on Emerging 2D Ferroelectricity

“…With the development of non‐volatile flash memory devices, there have been extensive studies on next‐generation, non‐volatile RAM devices for faster computing and memory applications. Such non‐volatile memory devices include magneto‐resistive RAM (MRAM), [ 12,13 ] resistive RAM (RRAM), [ 14,15 ] phase‐change RAM (PRAM), [ 16,17 ] and ferroelectric RAM (FeRAM). [ 18,19 ]…”

“…With the development of nonvolatile flash memory devices, there have been extensive studies on next-generation, non-volatile RAM devices for faster computing and memory applications. Such non-volatile memory devices include magneto-resistive RAM (MRAM), [12,13] resistive RAM (RRAM), [14,15] phase-change RAM (PRAM), [16,17] and ferroelectric RAM (FeRAM). [18,19] In this review, we will mainly discuss memory and synaptic devices based on emerging 2D layered ferroelectric materials, beyond silicon-based volatile RAM devices.…”

“…[7][8][9][10][11] The primary candidates for nextgeneration memory devices are based on the type of switching mechanism, considering the materials' magnetic, resistive and phase-change, or ferroelectric features. [12][13][14][15][16][17][18][19] The switching characteristics of conventional 3D materials have been actively investigated, but the fabrication cost and fine engineering required for the device performance still remain critical issues with such 3D materials. Since the discovery of graphene, atomically thin 2D [20][21][22] and 1D [23] materials have emerged as new candidates for future memory devices.…”

Multi‐Wavelength‐Recognizable Memristive Devices via Surface Plasmon Resonance Effect for Color Visual System

“…promising candidate for artificial synapses due to its variable conductance similar to the change of synaptic weight as well as its fast switching speed, low power consumption, and high-density stacking. [12][13][14][15] The conductance of memristive devices can be dynamically modulated in response to a variety of external stimuli, such as electric, [12,13] magnetic, [16,17] humidity, [18,19] or photo-illumination. [20][21][22][23] Among these stimuli, optical signal possesses the advantages of low power consumption, wide bandwidth, and low crosstalk, which is of great significance for the construction of an efficient brain-like computing network.…”

Efficient Method for Error Detection and Correction in In‐Memory Computing Based on Reliable Ex‐Logic Gates

“…Recent works have been reported to address the challenges, but few have addressed the stochasticity of the memristors in a logic gate despite the requirement of strict control for the logic cascading. [14][15][16] For instance, three cascaded two-input NOR gates with a bit-error-rate (BER) of 7% result in an increment in the BER to 20% ((1-0.93 3 ) Â 100). In other words, a higher control in stochasticity of the single-logic operation is required as the number of cascaded logic gates increases for the complex logic operation.…”