Ultrahigh Speed Reconfigurable Logic Operations Based on Single Semiconductor Optical Amplifier

In recent years energy consumption has become a main concern for network development, due to the exponential increase of network traffic. Potential energy savings can be obtained from a load-adaptive scheme, in which a day can be divided into multiple time periods according to the variation of daily traffic patterns. The energy consumption of the network can be reduced by selectively turning off network components during the time periods with light traffic. However, the time segmentation of daily traffic patterns affects the energy savings when designing multiperiod logical topology in optical wavelength routed networks. In addition, turning network components on or off may increase the overhead of logical topology reconfiguration (LTR). In this paper, we propose two mixed integer linear programming (MILP) models to design the optimal logical topology for multiple periods in IP-over-WDM networks. First, we formulate the time-segmentation problem as an MILP model to optimally determine the boundaries for each period, with the objective to minimize total network energy consumption. Second, another MILP formulation is proposed to minimize both the overall power consumption (PC) and the reconfiguration overhead (RO). The proposed models are evaluated and compared to conventional schemes, in view of PC and RO, through case studies.

Section: Results Of Opd Modelmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Efficient Logical Topology Design Considering Multiperiod Traffic in IP-over-WDM Networks

Li¹,

Kim²

2015

“…Proposals based on polarizationbased logic implementation have some drawbacks, as the state of polarization may change at the reflecting or refracting points along the transmission or propagation path. SOA-based all-optical signal processing has demonstrated great potential in terms of high speed, low power consumption, and optical integration [16]. Only a few works have reported on an all-optical full adder implementation, but with different schemes.…”

Section: Introductionmentioning

confidence: 99%

All-Optical Binary Full Adder Using Logic Operations Based on the Nonlinear Properties of a Semiconductor Optical Amplifier

Kaur

Kaler

Kamal

2015

Self Cite

We propose a new and potentially integrable scheme for the realization of an all-optical binary full adder employing two XOR gates, two AND gates, and one OR gate. The XOR gate is realized using a Mach-Zehnder interferometer (MZI) based on a semiconductor optical amplifier (SOA). The AND and OR gates are based on the nonlinear properties of a semiconductor optical amplifier. The proposed scheme is driven by two input data streams and a carry bit from the previous less-significant bit order position. In our proposed design, we achieve extinction ratios for Sum and Carry output signals of 10 dB and 12 dB respectively. Successful operation of the system is demonstrated at 10 Gb/s with return-to-zero modulated signals.

“…Also, some other logic gates based on silicon micro-ring resonators [23], two photon absorption in silicon waveguides [24], cross phase modulation [25], and single semiconductor optical amplifiers have been investigated [26].…”

Section: Introductionmentioning

confidence: 99%

All Optical Logic Gates Based on Two Dimensional Plasmonic Waveguides with Nanodisk Resonators

Dolatabady¹,

Granpayeh²

2012

In this paper, we propose, analyze and simulate the performances of some new plasmonic logic gates in two dimensional plasmonic waveguides with nanodisk resonators, using the numerical method of finite difference time domain (FDTD). These gates, including XOR, XNOR, NAND, and NOT, can provide the highly integrated optical logic circuits. Also, by cascading and combining these basic logic gates, any logic operation can be realized. These devices can be utilized significantly in optical processing and telecommunication devices.