Ultra-Stable Epitaxial Polysilicon Resonators

Abstract

Epitaxially grown polycrystalline silicon (epi-poly) has shown great promise as a MEMS material, offering isotropic material properties with minimal residual stress and stress gradients. While epi-poly has been used previously for MEMS inertial systems or sensors, its use in high precision resonator applications has been restricted to an encapsulation layer for resonators fabricated in single crystal silicon. In this work, encapsulated resonators fabricated with epi-poly as the functional layer were tested alongside single crystal silicon devices with regard to resonant frequency, quality factor, temperature dependence, and stability. Test results indicate that epi-poly resonators have very similar mechanical properties and stability to single crystal silicon resonators when operated in a clean package.

Characterization of Oxide-Coated Polysilicon Disk Resonator Gyroscope Within a Wafer-Scale Encapsulation Process

“…This collaboration is continuing to develop improvements and extensions to this process for many applications, and the baseline process has been brought into commercial production by SiTime Inc. Figure 2 shows the fabrication process of these encapsulated epitaxial polysilicon (epi-poly) devices with oxide coating. This fabrication process combines features from previous works [16], [20]. First, 2 μm thermal oxide was grown on a single crystal silicon substrate (Figure 2 (Figure 2-l).…”

“…We have previously demonstrated the low-end tactical grade performance of a hermetically encapsulated high-Q epi-poly disk resonator gyroscopes (DRG) [15], achieving a bias instability of 3.29°/hr. In addition, epi-poly resonators fabricated in the same process have shown <100 ppb level frequency stability over four days of measurement [16]. However, encapsulated epi-poly devices suffer from large surface roughness due to random grain growth during the epitaxial sealing process, in which the seal takes place in a hydrogen ambient at high-temperature (>1000°C), causing silicon migration [17], resulting in a random growth of polysilicon grains.…”

Ultra-high aspect ratio trenches in single crystal silicon with epitaxial gap tuning

“…However, the crucial step for the epi-seal process is the high temperature (> 1000°C) bake step in an epitaxial reactor prior to the seal -this bake step removes contaminants and native oxide to achieve the acclaimed stability. Polysilicon surfaces at these high temperatures are known to roughen due to silicon migration causing grain growth along the randomly oriented grains [12]. This roughening of polysilicon surfaces could cause the bridging of narrow transduction gaps, and this thus precludes the use of polysilicon in the epi-seal process.…”

Stable pull-in electrodes for narrow gap actuation

“…the High Aspect-Ratio Combined Poly and Single-Crystal Silicon (HARPSS) [3]). However, in the effort to produce a device compatible with the epi-seal epitaxial polysilicon encapsulation process (a high vacuum, ultra-clean, high yield, wafer-scale commercial process that has been used for stable resonators) [4,5], such a sacrificial oxide / polysilicon refill process cannot be used, as the high temperature (>1000°C) bake step in an epitaxial reactor removes the native oxide and the polysilicon surface roughens due to silicon migration [6]. This roughening of the polysilicon surface on the order of hundreds of nanometers precludes the use of the material for submicron narrow gaps within the epi-seal process.…”