Abstract:A compiler technique to utilize instruction level parallelism is presented in this paper. The software pipelining algorithm presented concentrates on innermost looops with array accesses dominating variable references. Dependence graphs labeled with either direction or distance information are provided as input to the pipelining algorithm. In the first step of the algorithm, a loop body of minimal schedule length is generated for a machine with infinite resources. This schedule is mapped onto a processor with … Show more
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