2019
DOI: 10.1109/led.2019.2935890
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Ultra-Low Program Current and Multilevel Phase Change Memory for High-Density Storage Achieved by a Low-Current SET Pre-Operation

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Cited by 14 publications
(13 citation statements)
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“…As presented in Figure 3F , all cells show consistently low power consumption at a few tens of fJ, always below that of CNT‐GST devices (80–100 fJ). [ 34 , 35 ] Note that if GST is used in the same D 250 device setup, the average E RESET value would be of nJ level, [ 64 ] which is 4–5 orders of magnitude higher than the GSO‐ D 250 devices.…”
Section: Resultsmentioning
confidence: 99%
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“…As presented in Figure 3F , all cells show consistently low power consumption at a few tens of fJ, always below that of CNT‐GST devices (80–100 fJ). [ 34 , 35 ] Note that if GST is used in the same D 250 device setup, the average E RESET value would be of nJ level, [ 64 ] which is 4–5 orders of magnitude higher than the GSO‐ D 250 devices.…”
Section: Resultsmentioning
confidence: 99%
“…RESET is accomplished at ≈1.5 µA, which is a current more than 3 orders of magnitude lower than that in GST‐ D 250 pore‐like devices, for which the current needed is as large as ≈3.0–11.4 mA. [ 64 ] Notably, our I RESET is comparable to that realized in nanowire devices, that is, the CNT‐GST devices (≈5 and ≈1.6 µA for CNT diameters of ≈3 [ 34 ] and ≈1.7 nm [ 35 ] ). This is an indication that the effective switching volume for RESET operations in our device is indeed on nanoscale dimensions and the bridges being open and shut must be very few.…”
Section: Resultsmentioning
confidence: 99%
“…Moreover, recent advances have demonstrated the use of NVM toward on-chip neuromorphic computing [27] and artificial intelligent (AI) accelerators [29]. In particular, the spin-transfer torque magnetic random access memory (STT-MRAM) [18], resistive random access memory (ReRAM) [7], phase change memory (PCM) [12] and ferroelectric memory [22] have been most widely explored technologies for these IoT and AI applications.…”
Section: Introductionmentioning
confidence: 99%
“…In this array, phase change random access memory (PCRAM) is used as a memory component because it can meet overall requirements such as rapid switching speed, good data retention, high endurance, high scalability, and low cost 46 . For decades, many studies have attempted to improve the performance of PCRAM, namely, by reducing operation energy and enhancing endurance 7,8 . To achieve higher storage density, 3D crossbar technology was exploited to deliver multiple terabytes of storage on a single chip 9 .…”
Section: Introductionmentioning
confidence: 99%