UAV Communications: Integrating a Real-World Scenario with Computer Architecture

Augeri, Christopher J.; Neebel, Danial J.; Baird, Leemon C.; Freitas, Adrian A. de

doi:10.1109/fie.2005.1612068

Cited by 2 publications

(2 citation statements)

References 7 publications

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“…Each trace file used contained 1,000,000 memory accesses. Our cache simulator exercise is the last of a four-part PEX series with the first three PEXes and other course information extensively described in [1].…”

Section: Programming Exercise Designmentioning

confidence: 99%

“…The CS program meets the ACM 2001 curriculum guidelines [4], with computer architecture requirements split 30-50-10-5-5 (%) among digital systems, computer architecture, operating systems, networks and compiler courses respectively -more detail is in [1]. The six hours of cache memory material are organized as an overview, directmapped cache design and analysis, m-way associative design, overall performance analysis, a short introduction to virtual memory and the roles that cache, main memory, and swap space play in the memory hierarchy.…”

Section: Introductionmentioning

confidence: 99%

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Work in Progress - A Visual Cache Memory Simulator

Neebel

Augeri²,

MacMillan³

et al.

Proceedings Frontiers in Education 35th Annual Conference

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Cache memory performance analysis is a challenging topic upon first introduction. Students must synthesize a significant amount of computer architecture knowledge, comprehend reasonably complex replacement strategies, and analyze performance. We propose a programming exercise that has students develop a visual cache memory simulator and then use the simulator to analyze several memory reference trace files. Our student learning assessment measured the quality of each team programming exercise solution and each individual's own cache performance analysis. In addition, the final exam has several questions related to cache memory. Early results indicate students achieve a better understanding of cache memory and its impact on performance.

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Section: Programming Exercise Designmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Work in Progress - A Visual Cache Memory Simulator

Neebel

Augeri²,

MacMillan³

et al.

Proceedings Frontiers in Education 35th Annual Conference

Self Cite

View full text Add to dashboard Cite

show abstract

Authentication of MAV communication using Caesar Cipher cryptography

Rajatha¹,

Ananda²,

Nagaraj

2015

2015 International Conference on Smart Technologies and Management for Computing, Communication, Controls, Energy and Materials

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This paper suggests the improvement of security in Micro Aerial Vehicle (MAV) communication protocol for the communication between the Ground Control Station (GCS) and the MAV. Proposed method involves the implementation of the Caesar Cipher method of data encryption with a secured key. The method of Ciphering is used for authentication of the Micro Aerial Vehicle at the beginning of the communication. Later the same is used for critical command, control and parameter messages at varied frequencies. This results in improvement of security and reliability of the system in defense and other high security applications.

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UAV Communications: Integrating a Real-World Scenario with Computer Architecture

Cited by 2 publications

References 7 publications

Work in Progress - A Visual Cache Memory Simulator

Work in Progress - A Visual Cache Memory Simulator

Authentication of MAV communication using Caesar Cipher cryptography

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