Two‐Terminal Multibit Optical Memory via van der Waals Heterostructure

Abstract

cells, [11] and memory. [12,13] Recently, vdWs heterostructure-based nonvolatile optical memory have been investigated for broad potential applications in imaging sensors, [14] logic gates, [15] optoelectronic demodulators, [16] and synaptic devices for neuromorphic systems. [17,18] These 2D vdWs materials and their hybrids are considered to be an ideal platform for nonvolatile optical memory owing to their strong light-matter interactions [19][20][21] and significant photogenerated charge trapping derived from their very large surface-to-volume ratio. [22][23][24] In addition, the mechanical strength and atomic thickness of 2D vdWs materials allow for device miniaturization in flexible and wearable optoelectronics. [25][26][27] The demonstration of 2D vdWs materials-based optical memory in the FETs of few-layer copper indium selenide (CuIn 7 Se 11 ) has been reported [14] along with hybrids of graphene/MoS 2[5] on a silicon substrate. These devices exhibit low optical switching on/off ratios (<1 [5] and ≈10 [14] ), high off-currents (≈400 µA [5] and 20 pA [14] ), and short retention times (50 s [14] ), preventing their use in high quality image sensors and multilevel storage devices.Using oxygen plasma treatments to create more charge trap sites at SiO 2 surface, monolayer MoS 2 -FET-based optical memory on silicon substrate has exhibited a long retention time of ≈10 4 s. [28] However, the data storage capacity of eight levels of the material remains limited for practical applications due to moderate switching on/off ratio of ≈4700. Importantly, the memory function of these devices relies on charge trapping of photoexcited carriers in defects and impurities on either the surface or material/SiO 2 interface. [5,28] This results in short retention times and sensitivity to environmental factors. A charge trapping layer acting as a floating gate, instead of charge trapping at the materials/SiO 2 interface, can be introduced via gold nanoparticle/crosslinked poly(4-vinylphenol)/MoS 2 heterojunction-FETs, which significantly increase both the switching on/off ratio (≈10 6 ) and retention time (>10 4 s). [29] Similarly, by storing charge in the hexagonal boron nitride (h-BN) dielectric layer, the WSe 2 /h-BN-FET-based optical memory on silicon also exhibited a high on/off ratio of 1.1 × 10 6 , realizing a data storage capability of up to 128 distinct states. [30] Despite the long retention time and high on/off ratios of the recently developed vdWs heterostructure-based optical memory 2D van der Waals (vdWs) heterostructures exhibit intriguing optoelectronic properties in photodetectors, solar cells, and light-emitting diodes. In addition, these materials have the potential to be further extended to optical memories with promising broadband applications for image sensing, logic gates, and synaptic devices for neuromorphic computing. In particular, high programming voltage, high off-power consumption, and circuital complexity in integration are primary concerns in the development of three-terminal optical memory devices....

Multibit Optoelectronic Memory in Top‐Floating‐Gated van der Waals Heterostructures

“…To evaluate the performance of our optoelectronic memory, we also investigated its charge storage stability and endurance of electrical programming and optical erasing. Figure b displays a highly stable erase state after applying a laser pulse of 473 nm for 1 s. The reduction of the channel current was just 2.237 × 10 −8 A (≈7.2%) and nearly can be neglected even after 10 4 s. This result is much better than recently reported by Tran et al which the on‐current decrease an order (≈20%) directly after 10 4 s. Additionally, the on‐ and off‐current are almost unchanged (Figure c) and maintain the ratio up to 10 6 during the multiple operations of electrical programming and optical erasing. Here, utmost stability against voltage stress of the h‐BN dielectric layer as well as the separation of the control gate and floating gate are responsible for the high durability and reliability of our device …”

“…On the other hand, there was no observable change for I DS after applying 1550 nm light pulse (0.8 eV). Thus, we can conclude that the photogenerated carriers in MoS 2 channel, rather than the photoresponse of the top floating Gr, are responsible for the optical erasing behavior observed in the MoS 2 /h‐BN/Gr heterostructure . In addition, devices with bare MoS 2 and MoS 2 /h‐BN were fabricated and measured as control experiments (Figure e).…”

A generic method to control hysteresis and memory effect in Van der Waals hybrids

“…One major area of thrust with Van der Waals hybrids has been to achieve non-volatile, durable memory action, which provide several advantages such as reduced power consumption, higher integration density, and enhanced life-times [43,44]. In this work, we have demonstrated a generic device architecture to achieve nonvolatile memory effect in stacks made using 2D materials in a floating gate geometry [45][46][47][48]. While the floating gate geometry has been exploited in case of transition metal dichalcogenide-based in 2D atomic/molecular layers, it's applicability for a broader range of 2D materials, and an optimization of the architecture itself, remains unexplored.…”

Emerging Artificial Two-Dimensional van der Waals Heterostructures for Optoelectronics

“…A special advantage of such device is their reconfigurable device behavior on demand. The device structure can be further simplified into two-terminal structures by removing the control gate, which usually is the back-Si gate [20]. Figure 7e displays a schematic structure of such twoterminal float memory.…”

“…The great flexibility in assembling 2D materials thus renders unprecedented opportunity in discovering novel nanoscale transport phenomenon [14] and carrier dynamics and stimulates the exploration of 2D functional devices via deliberately designing the heterostructures. In optoelectronics, this enabled the tailoring of charge separation characteristics of photogenerated electron-hole pairs in semiconductors [15], thereby allowing innovated designs of heterostructured transistors [16,17], tunneling diode for photodetection [18,19], and further optoelectronic memories with float gate structures [20].…”