Two-dimensional digital filters with minimum cycle time

Ty, K.; Venetsanopoulos, A.N.

doi:10.1109/icassp.1985.1168210

Cited by 4 publications

(1 citation statement)

References 4 publications

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“…Hence, the implementation of second-order nonlinear filters is equivalent to the implementation of 1-D linear filters with some extra operations. Based on the 1-D quadratic filter of (21), we define a 2-D quadratic digital filter as follows: hi,j,k, i=O j=O k-0 /co where x, n and y, n and hij;, , are the input and output image pixels is the 2-D quadratic kernel. We can assume without loss of generality that Ni = Nk and Nj = N!.…”

Section: Two-dimensionalquadratic Digital Filter Architecturementioning

confidence: 99%

High-speed architectures for digital image processing

Venetsanopoulos¹,

Loui

1987

IEEE Trans. Circuits Syst.

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Absiract-This paper introduces the problem of and presents some state-of-the-art approaches for high-speed digital image processing. An architecture based on distributed arithmetic, which eliminates the use of multipliers, is described. A minimum-cycle-time filter architecture, which features a high degree of parallelism and pipelining, is shown to have a throughput rate that is independent of the filter order. Furthermore, a new multiprocessing-element architecture is proposed. This leads to a filter structure which can be implemented using identical building blocks. A modular VLSI architecture based on the decomposition of the kernel matrix of a two-dimensional (2-D) transfer function is also presented. In this approach, a general 2-D transfer function is expanded in terms of low-order 2-D polynomials. Each one of these 2-D polynomials is then implemented by a VLSI chip using a bit-sliced technique. In addition, a class of nonlinear 2-D filters based on the extension of one-dimensional (1-D) quadratic digital filters is introduced. It is shown that with the use of matrix decomposition, these 2-D quadratic filters can be implemented using linear filters with some extra operations. Finally, comparisons are made among the different approaches in terms of cycle time, latency, hardware'complexity, and modularity.

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Section: Two-dimensionalquadratic Digital Filter Architecturementioning

confidence: 99%

High-speed architectures for digital image processing

Venetsanopoulos¹,

Loui

1987

IEEE Trans. Circuits Syst.

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Real-time systolic array processor for 2-D spatial filtering

Steenaart

1988

IEEE Trans. Circuits Syst.

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Multidimensional filters for high-speed processing

Venetsanopoulos²

1987

IEEE Trans. Acoust., Speech, Signal Process.

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Abstract-A new digital filter structure is developed for the realization of multidimensional recursive filters used in high-speed processing. The structure possesses a high throughput rate, which depends on the dimensionality m of the filter, but is independent of its order. The features that contribute to its high-speed performance include both parallelism and pipelining. The clock cycle of the proposed filter structure is derived and expressed in terms of the time required for each arithmetic operation. I. INTRODUCTIONMultidimensional (m-D) signal processing requires an enormous number of arithmetic operations to be performed per second. One of the feasible solutions to this demanding task is to use multiprocessors [l]. However, with a suitable separation of the processing into stages, a fully pipelined parallel-processing architecture can be developed. One-dimensional (1-D) and two-dimensional (2-D) high-speed digital filter structures have been reported in [2]-[SI. In this correspondence, a fast filter structure for the implementation of a general m-D recursive digital filter is proposed.Due to the speed limitation of data propagation in the feedback loop [2], recursive filters are being considered. The motivation behind this contribution is to provide insight into the dependency of the filter throughput rate on its dimensionality and order.

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Two-dimensional digital filters with minimum cycle time

Cited by 4 publications

References 4 publications

High-speed architectures for digital image processing

High-speed architectures for digital image processing

Real-time systolic array processor for 2-D spatial filtering

Multidimensional filters for high-speed processing

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