TSV-Aware Analytical Placement for 3-D IC Designs Based on a Novel Weighted-Average Wirelength Model

A fast force-directed simulated annealing for 3D IC partitioning

“…Further, the proposed partitioning can be followed by a thermal-aware placement for each tier and the wirelength and temperature can be optimized during this process [11][12][13][14][15][16].…”

“…If the cost of the new solution generated by the neighbor function is less than the cost of current solution, the current solution is replaced by the new solution (lines 10-12). Otherwise, this move takes effect with a probability (lines [13][14][15][16][17][18]. Then the temperature T is reduced by a factor of α Based on classical SA, new extended simulated annealing algorithms are introduced.…”

“…Same as the standard SA algorithm, if the cost of the new solution generated by the neighbor function is less than the cost of current solution the current solution is replaced by the new solution (lines [10][11][12]. Otherwise this move takes effect with a probability (lines [15][16][17][18]. After every move the cost is updated (lines 13,19) …”

ePlace-MS: Electrostatics-Based Placement for Mixed-Size Circuits

“…As the function HP W L(v) in Eq. (1) is not differentiable, various quadratic [7], [20] and nonlinear [12], [35] wirelength smoothing techniques have been proposed in literature to ensure the differentiability thus analytic placement to work. In this work, we use both the log-sum-exp (LSE) [35] model and the weighted-average (WA) [12] model (as two options for ePlace-MS) to approximate HPWL via a closedform smooth function W (v), as shown in Eq.…”

“…Since W (v) in both LSE and WA are strongly convex [12], [35] and globally differentiable, the Hessian matrices are also positive definite with straightly positive eigenvalues. As a result, we can use the closed-form formula…”