Trusted computing - A new challenge for embedded systems

Vaslin, Romain; Gogniat, Guy; Diguet, Jean-Philippe; Pégatoquet, Alain

doi:10.1109/icecs.2006.379904

Cited by 2 publications

(1 citation statement)

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“…The security of (embedded) computer systems was an active research area in both academia and industry long before the TCG started to develop trust specifications for mobile devices [13,17,18,23,24,37]. This extensive body of research was triggered, in part, by the observation that basic protection mechanisms like providing virtual memory or separating user and supervisor modes are simply not sufficient to safeguard effectively against the ever-growing number of malicious attacks [12].…”

Section: Introductionmentioning

confidence: 99%

2008 IEEE international workshop on hardware-oriented security and trust (HOST)

2008

2008 IEEE International Workshop on Hardware-Oriented Security and Trust

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Hardware TrojansABSTACT Trust in reference to integrated circuits addresses the concern that the design and/or fabrication of the IC may be purposely altered by an adversary. The insertion of a hardware Trojan involves a deliberate and malicious change to an IC that adds or removes functionality or reduces its reliability. Trojans are designed to disable and/or destroy the IC at some future time or they may serve to leak confidential information covertly to the adversary. Trojans are cleverly hidden by the adversary to make it extremely difficult for chip validation processes, such as manufacturing test, to accidentally discover them. This paper investigates a power supply transient signal analysis method for detecting Trojans that is based on the analysis of multiple power port signals. In particular, we focus on determining the smallest detectable Trojan in a set of process simulation models that characterize a TSMC 0.18 um process.Abstract-New attacker scenarios involving integrated circuits (ICs) are emerging that pose a tremendous threat to national security. Concerns about overseas fabrication facilities and the protection of deployed ICs have given rise to methods for IC authentication (ensuring that an IC being used in a system has not been altered, replaced, or spoofed) and hardware Trojan Horse (HTH) detection (ensuring that an IC fabricated in a nonsecure facility contains the desired functionality and nothing more), but significant additional work is required to quell these treats. This paper discusses how a technique for precisely measuring the combinational delay of an arbitrarily large number of register-to-register paths internal to the functional portion of the IC can be used to provide the desired authentication and design alteration (including HTH implantation) detection. This low-cost delay measurement technique does not affect the main IC functionality and can be performed at-speed at both test-time and run-time. ABSTRACTThis paper addresses a new threat to the security of integrated circuits (ICs) used in safety critical, security and military systems. The migration of IC fabrication to low-cost foundries has made ICs vulnerable to malicious alterations, that could, under specific conditions, result in functional changes and/or catastrophic failure of the system in which they are embedded. We refer to such malicious alternations and inclusions as Hardware Trojans. The modification(s) introduced by the Trojan depends on the application, with some designed to disable the system or degrade signal integrity, while others are designed to defeat hardware security and encryption to leak plain text information. This paper explores the wide range of malicious alternations of ICs that are possible and proposes a general framework for their classification. The taxonomy is essential for properly evaluating the effectiveness of methods designed to detect Trojans. The latter portion of the paper explores several Trojan detection strategies and the classes of Trojans each is most likely to detect. Abstract...

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Section: Introductionmentioning

confidence: 99%