2015
DOI: 10.1109/tns.2015.2397973
|View full text |Cite
|
Sign up to set email alerts
|

Triroc: A Multi-Channel SiPM Read-Out ASIC for PET/PET-ToF Application

Abstract: Triroc is the latest addition to SiPM readout ASICs family developed at Weeroc, a start-up company from the Omega microelectronics group of IN2P3/CNRS. This chip is developed under the framework TRIMAGE European project which is aimed for building a cost effective tri-modal PET/MR/EEG brain scan. To ensure the flexibility and compatibility with any SiPM in the market, the ASIC is designed to be capable of accepting negative and positive polarity input signals. This 64-channel ASIC, is suitable for SiPM readout… Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
2
2
1

Citation Types

0
30
0

Year Published

2016
2016
2024
2024

Publication Types

Select...
8
1

Relationship

1
8

Authors

Journals

citations
Cited by 44 publications
(30 citation statements)
references
References 2 publications
0
30
0
Order By: Relevance
“…Each array was an 8 × 4 matrix of the SiPM cell with an active area of 3 × 3 mm 2 and an outside dimension of 3.4 × 3.4 mm 2 . The 64 SiPM outputs from one tile were processed by a 64-channel TRIROC ASIC [117]. The preliminary measurement showed that the PET detector could provide a CRT of 420 ps FWHM and an energy resolution of 10.7% with a single crystal (3.3 × 3.3 × 8.0 mm 3 ) setup.…”
Section: Silicon Photomultipliers (Sipms)mentioning
confidence: 99%
“…Each array was an 8 × 4 matrix of the SiPM cell with an active area of 3 × 3 mm 2 and an outside dimension of 3.4 × 3.4 mm 2 . The 64 SiPM outputs from one tile were processed by a 64-channel TRIROC ASIC [117]. The preliminary measurement showed that the PET detector could provide a CRT of 420 ps FWHM and an energy resolution of 10.7% with a single crystal (3.3 × 3.3 × 8.0 mm 3 ) setup.…”
Section: Silicon Photomultipliers (Sipms)mentioning
confidence: 99%
“…The 64 signals from a tile are read out by a 64-channel TRIROC ASIC [22]. In each analog channel of the ASIC, the input signal is split into a high-gain and a low-gain path for time and charge A/D conversion, respectively.…”
Section: B Data Acquisition System and Power Supplymentioning
confidence: 99%
“…A total of 18 TX boards (one per sector) are used in the TRIMAGE PET system. Every time a TRIROC detects an event, it produces a series of data packets containing the ADC and TDC outputs, one per validated channel [22], [23]. Each data packet is decoded by the FPGA and its TDC payload is calibrated using a calibration map that is loaded on-chip at boot time.…”
Section: B Data Acquisition System and Power Supplymentioning
confidence: 99%
“…These ASICs typically support 8 to 64 data channels [12]- [20]. The time binning of the employed time-to-digital converters (TDC) can range from 20 ps-50 ps [18], [19], [21], [22]. The energy of the signal can either be measured by a time-over-threshold method (tot-mode) [13], [23] or via signal integration (qdcmode), e.g., as applied for the Weeroc, PETA and TOFPET ASIC series [12], [15], [18]- [20], [24]- [32] The measurement can be linear for integrating charges up to 2000 p.e.-3000 p.e.…”
Section: Introductionmentioning
confidence: 99%