Computing in High Energy Physics '95 1996
DOI: 10.1142/9789814447188_0076
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Triggering and Event Building Results Using the C104 Packet Routing Chip

Abstract: The C104 is an asynchronous 32-way dynamic packet routing chip. It has a 264 Mbytes/s bi-directional bandwidth and a 1 sec switching latency. It oers high-density costeective commodity communications, which allow large switching networks to be constructed. Results are presented on the performance of this switching technology within the context of future High Energy Physics level II and level III trigger data trac patterns.(To b e submitted to Nuclear Instruments and Methods)

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