Trap sensitivity of splitted source Z Shape horizontal pocket and hetero stack TFETs: a simulation study

Abstract

This paper reports the trap sensitivity analysis of split source horizontal pocket Z shape tunnel field effect transistor (ZHP-TFET) and hetero stack TFET (HS-TFET) using technology computer aided design (TCAD) simulator. The sensitivity analysis elaborates the significance of ideal trap charges at the interface of oxide and semiconductor material for both acceptor and donor like traps. The trap sensitivity analysis is highlighted for variation in trap-concentrations, temperature, gate-metal work function, and peak energy position, for both the TFETs. Furthermore, we have implemented digital inverter on taking into account the interface trap charges effect. Result reveals that tarp sensitivity on various electrical parameter of HS-TFET is significantly higher than ZHP-TFET. It is seen that ZHP-TFET provides sensitivity around 11 and 33 under acceptor and donor impurities, respectively, whereas, for HS-TFET sensitivity is around 22 and 60 for acceptor and donor impurities, respectively, for wide variation in trap concentration. The voltage transfer characteristic and voltage gain of digital inverter are improved by observable amount in ZHP-TFET than HS-TFET for both donor and acceptor like trap. The noise margin of ZHP-TFET based resistive inverter comes 0.75 V, 0.73 V, and 0.77 V, while in case of HS-TFET these value noted as 0.32 V, 0.13 V and 0.37 V under consideration for no trap, acceptor trap, and donor trap, respectively.

Study on trap sensitivity for single material gate and double material gate nano-ribbon FETs

“…On the other hand, sensitivity in trap is another important parameter as it describes the sensitivity in drain current for FET in the existence of ITCs. Such trap sensitivity for the variation in trap concentrations, energy mid-gap, temperature, and work function of gate metal are reported in Z-shape horizontal pocket (ZHP) TFET and Hetero Stack (HS) TFET [17]. Moreover, till date the trap sensitivity in NRFET is not reported in literature.…”

“…Therefore, it is imperative to study the sensitivity of drain current in the presence of ITCs for NRFET. Such sensitivity in drain current due to trap charges is reported in TFET structures [17]. Considering the practical existence, in this work the trap sensitivity is emphasized for wide distinction in trap concentration, work function, energy mid, and temperatures in SMG and DMG NRFETs using TCAD device simulator [28].…”

Photo sensing analysis of T-shape TFET sensor under visible range of spectrum

“…In the past few years, demand for high performance, low power and fast switching devices have replaced the CMOS with advanced MOS technology [1,2]. Tunnel FET (TFET) has qualities to meet the requirements due to interband tunneling mechanism of current flow instead of thermionic emission [3][4][5]. Additionally, TFET device provides better immunity against the short channel effects (SCEs), lower power leakages and an improved switching performance.…”