Transmitter utilising bandpass delta-sigma modulator and switching mode power amplifier

Ketola, J.; Sommarek, J.; Vankka, Jouko; Halonen, K.

doi:10.1109/iscas.2004.1328274

Cited by 26 publications

(11 citation statements)

References 8 publications

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“…In both cases the depth of the noise notches is limited by various noise sources. Two of the most significant noise sources include clock jitter and asymmetric rise and fall times and affect the signal at the discrete-to-continuous interface [10].…”

Section: High Order High-pass σ∆ Modulatorsmentioning

confidence: 99%

Using high pass sigma-delta modulation for Class-S power amplifiers

Ralph

Farrell

2007

2007 18th European Conference on Circuit Theory and Design

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Switching power amplifiers offer the potential for superior efficiencies if used at radio frequencies. However many existing bandpass architectures require a switching frequency four times that of the signal, making implementation difficult. In this paper we propose to use a high-pass sigma-delta modulator to reduce the switching rate to only twice of the signal. We will present a solution to the problem of the reflected image and demonstrate it's viability for use in mobile telephony.

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Section: High Order High-pass σ∆ Modulatorsmentioning

confidence: 99%

Using high pass sigma-delta modulation for Class-S power amplifiers

Ralph

Farrell

2007

2007 18th European Conference on Circuit Theory and Design

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“…The high efficiency power amplifiers (Pas) are recently focusing on switch-mode operation [2,3,4]. One possible solution for implementing high linearity and high efficiency transmitter is Class-S amplifier [5]. In typical Class-S concept can be classified three main parts of whole system as shown in Fig.…”

Section: Introductionmentioning

confidence: 99%

Tunable continuous-time ΔΣ modulator for switching power amplifier

Lee

Park

Jang

et al. 2012

IEICE Electron. Express

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Abstract:A fully integrated tunable 4 th -order multi-feedback bandpass delta-sigma modulator (BPDSM) fabricated in 0.25 um SiGe BiCMOS is presented. The input frequency can be tuned from 945 MHz to 988 MHz at 2.4 GHz fixed clock frequency. This modulator dissipates 110 mA from 3.3 V power supply. The peak signal-to-noise-ratio (SNR) of sinewave input is 41.1 dB in 10 MHz bandwidth and error vector magnitude (EVM) of 64QAM long term evolution (LTE) downlink is 3.16%, 3.59%, and 3.65% at different carrier frequencies.

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“…In general the Σ∆ modulator is preferred since the PWM is not linear in itself and is more likely to require predistortion. As seen in [5], a bandpass Σ∆ modulator can be used directly with the PA. In this case the Σ∆ modulator is clocked at 4 times the RF frequency to modulate the RF signal and drive the PA. Serious design challenges are faced such as feedback in the Σ∆ modulator at 4 times the RF frequency.…”

Section: Introductionmentioning

confidence: 99%

“…Apart from proving the concept and validating and simulating the theoretical results, the purpose of this prototype is to explore a commercial and low cost solution. In the same field of research, many of the reported approaches are only validated by simulation [3][4][5]. And if a prototype or a testing method is reported, they are more focused on concept proof: A downscaled frequency prototype based on standard components is used in [9].…”

Section: Introductionmentioning

confidence: 99%