Transmission characteristics of multi‐walled carbon nanotube‐based through‐silicon vias considering temperature effects

Abstract

In this study, a simplified temperature‐dependent expression of electron mean free path (MFP) is proposed first. Then, the electrical model of multi‐walled carbon nanotube bundle‐based through‐silicon vias (MWCNTB‐TSVs) is established considering the temperature effects of the MFP, metal‐oxide‐semiconductor capacitance, substrate conductance and number of conducting channels of MWCNT. Based on this model, the propagation constant, forward transmission coefficient S21 and crosstalk at different temperatures are calculated. By analysing the phase constant, the zero dispersion transmission condition is obtained. According to this condition, the guidelines on how to select the substrate in different level integrations are proposed. Furthermore, a concise formula for the equivalent conductivity of MWCNTB is proposed. Moreover, the minimum diameter of MWCNTB‐TSV whose attenuation is less than that of copper‐filled TSV has been deduced.

The design and optimization of novel elliptic cylindrical through‐silicon via and its temperature characterization

“…With the size of TSV continues to decrease, the system puts forward higher requirements on the transmission characteristics of TSV in a wider frequency band. [19][20][21][22] In addition, due to the high power density and chip temperature in 3D stacking structure, the temperature influence on the performance of TSV is critical in its modeling, characterization, and design. [23][24][25] In order to further improving the transmission characteristics of TSV, a novel TSV structure, that is, elliptic cylindrical TSV, is proposed in this article.…”

“…With the size of TSV continues to decrease, the system puts forward higher requirements on the transmission characteristics of TSV in a wider frequency band 19–22 . In addition, due to the high power density and chip temperature in 3D stacking structure, the temperature influence on the performance of TSV is critical in its modeling, characterization, and design 23–25 .…”

An analysis of the eddy effect in through-silicon vias based on Cu and CNT bundles: the impact on crosstalk and power

“…Thus eddy resistance comes into the existence in the silicon substrate, neighboring TSVs, and depletion regions due to the flow of eddy current. In general, most of the state-ofthe art experimental evidences [11][12][13][14][15][16][17][18][19][20] describes an equivalent RLGC model of the cylindrical-shaped TSV without considering the eddy effect at high frequencies. Previously, Khalil et al [11] demonstrated an analytical model of Cu-based TSV that depends on its physical parameters.…”

“…Subsequently, Qian et al [16] proposed a lumped crosstalk noise model to capture TSV to TSV coupling noise in CNT-based 3D IC but neglected the impact of eddy resistance at the higher frequency. Later, Su et al [17] proposed an equivalent model of MWCNT based TSV using temperature effects that considered the eddy resistance due to the flow of eddy current in the substrate but neglected the eddy resistance impact due to depletion region and TSV material. Lu et al [18] demonstrated a pi equivalent electrical model of the Cu-based cylindrical TSV with consideration of eddy current and proximity effect at high frequencies.…”

“…However, the impact of several design parameters such as mutual inductance, eddy resistance, and depletion capacitance were ignored. Therefore, the state-of-the-art research [11][12][13][14][15][16][17][18][19][20] fails on some fronts to present a comprehensive analysis of eddy current for a pair of TSV at high frequencies, and hence a detailed investigation is required to apostrophize the eddy resistance of TSVs by considering all the physical parameters. This research work for the first time demonstrates the electrical modeling of the TSV considering the eddy effect at high frequencies.…”