Proceedings. IEEE Energy and Information Technologies in the Southeast'
DOI: 10.1109/secon.1989.132621
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Transient simulation of complex, lossy, multiport transmission line networks with nonlinear digital device termination using a circuit simulator

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Cited by 3 publications
(6 citation statements)
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“…Low-pass filtering has been used to achieve this [6]. The introduction of a small time delay also achieves this result with presumably less distortion [4].…”
Section: A Ircmentioning
confidence: 99%
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“…Low-pass filtering has been used to achieve this [6]. The introduction of a small time delay also achieves this result with presumably less distortion [4].…”
Section: A Ircmentioning
confidence: 99%
“…For , the last term is also zero since if if (5) Note that in all but one of the convolution sum terms, ; thus, most of the convolution sum can be performed before beginning the iterations to solve the nonlinear system of equations. The following error function is solved at each time step (6) and, in vector form, the complete system is . .…”
Section: Formulation Of the Transient Analysismentioning
confidence: 99%
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“…The interconnect media for the high-speed integrated circuits is becoming an important task for the electronic circuit designer at different levels, especially at the printed circuit board (PCB), the backplanes, the chip to chip, and the multichip designs. Many contributors have treated this subject; in [1] Paul gives an overview of the multi-conductor transmission lines (MTL) for electro-magnetic compatibility (EMC) applications; Nitsch et al [2] have investigated analytically the uniform MTL; Griffith et al [3] have investigated non-linear circuits using a mixed frequency and time-domain analysis; in [4], Nakhla et al have investigated the MTL with non-linear terminations by delay extraction-based sensitivity; in [5], Winkelstein et al have simulated a complex lossy multiport transmission lines terminated with a non-linear digital device. The interconnecting analysis would give an optimum design with a minimum transmission line effects such as the attenuation and impedance mismatching, as well for analog and digital systems; for example, the interconnect should not introduce any delay and should not modify, in particular, clock signals; also the recent developed mixed analog and digital electronic blocks require less power consumption; high-speed interconnects have been treated and simulated with a convolution-based hierarchical packaging simulator [6].…”
Section: Introductionmentioning
confidence: 99%
“…In [12], a criterion has been developed for short, medium, and long interconnect showing the inductance effect in the signal delay and cross-talk; in [13] rules are exposed to characterize the effect of the on-chip inductance and its correlation with the line damping ratio and the signal rise time. Modeling and simulating interconnect problem has been the subject of research for few decades for many contributors leading to different methods, techniques and algorithms, such as the impulse response and convolution (IRC) method treated in [5, 6, 14, 15], the asymptotic waveform evaluation (AWE) method [1618], and the numerical inversion of Laplace transform (NILT) [19–23].…”
Section: Introductionmentioning
confidence: 99%