SMC'03 Conference Proceedings. 2003 IEEE International Conference on Systems, Man and Cybernetics. Conference Theme - System Se
DOI: 10.1109/icsmc.2003.1244575
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Transformation of VHDL descriptions into DEVS models for fault modeling

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Cited by 5 publications
(7 citation statements)
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“…The main idea, shown in figure 6, consists in the transformation of the circuit-oriented models proposed in [13] into VHDL-AMS descriptions and then in the translation of those descriptions into BFS-DEVS components networks.…”
Section: Bfs-devs For Induction Machine Modellingmentioning
confidence: 99%
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“…The main idea, shown in figure 6, consists in the transformation of the circuit-oriented models proposed in [13] into VHDL-AMS descriptions and then in the translation of those descriptions into BFS-DEVS components networks.…”
Section: Bfs-devs For Induction Machine Modellingmentioning
confidence: 99%
“…Each statement of the VHDL-AMS code in the circuit architecture is converted into an atomic or coupled model. The rules used in [13] for the transformation of behavioral VHDL description can be implemented. However, an atomic model has to be added in the case of the "Simultaneous" statement whose behavior is the digital integration of differential equations.…”
Section: Bfs-devsmentioning
confidence: 99%
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“…Each of them is composed by sequential instructions such as assignment, conditional ("if-then-else, case"), and loop statements. We show in [34] that these descriptions can be represented using four BFS-DEVS atomic models:…”
Section: Vhdl To Bfs-devs Translationmentioning
confidence: 99%
“…• Knowledge reuse: Many existing techniques that are popular in M&S of real-time and embedded systems -such as State Charts [SchOO], Verilog [KimOl], VHDL [Cap03], Petri…”
Section: List Of Figuresmentioning
confidence: 99%