Transactional Acceleration of Concurrent Data Structures

Liu, Yujie; Zhou, Tingzhe; Spear, Michael

doi:10.1145/2755573.2755598

Cited by 4 publications

(10 citation statements)

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“…To keep our usage examples of power transactions concrete, we focus on the use of locks as the alternative path, effectively enhancing the standard TLE technique [14,37]. We note, though, that power mode is equally helpful in reducing the use of any fallback path, such as the one implemented using software transactional memory (STM) [9,28], lock-free techniques [26], and so on.…”

Section: Related Workmentioning

confidence: 99%

Improving Parallelism in Hardware Transactional Memory

Dice

Herlihy

Kogan

2018

ACM Trans. Archit. Code Optim.

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Today's hardware transactional memory (HTM) systems rely on existing coherence protocols, which implement a requester-wins strategy. This, in turn, leads to poor performance when transactions frequently conflict, causing them to resort to a non-speculative fallback path. Often, such a path severely limits parallelism. In this article, we propose very simple architectural changes to the existing requester-wins HTM implementations that enhance conflict resolution between hardware transactions and thus improve their parallelism. Our idea is compatible with existing HTM systems, requires no changes to target applications that employ traditional lock synchronization, and is shown to provide robust performance benefits. CCS Concepts: • Computer systems organization → Multicore architectures; • Theory of computation → Parallel computing models;

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Section: Related Workmentioning

confidence: 99%

Improving Parallelism in Hardware Transactional Memory

Dice

Herlihy

Kogan

2018

ACM Trans. Archit. Code Optim.

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“…First, the commit step in SCX 2 is eliminated. Whereas in SCX 2 , we stored a pointer to the SCX-record in r .info for each r ∈ V at line 11, we store a tagged pointer to the SCX-record at 3 Let infoF ields be a pointer to a table in p's private memory containing, 4 for each r in V , the value of r .info read by p's last LLX(r ) 5 Let old be the value for f ld returned by p's last LLX(r ) 6 Begin hardware transaction Let infoF ields be a pointer to a table in p's private memory containing, 22 for each r in V , the value of r .info read by p's last LLX(r ) 23 Let old be the value for f ld returned by p's last LLX(r ) 24 Begin hardware transaction line 29 in SCX 3 . A tagged pointer is simply a pointer that has its least significant bit set to one.…”

Section: Correctness and Progressmentioning

confidence: 99%

“…Consider an operation O that is implemented using the tree update template. One natural way to use HTM to accelerate O is to use the original operation as a fallback path, and then obtain an HTM-based fast path by wrapping O in a transaction, and performing optimizations to improve performance [23]. We call this the 2-path concurrent algorithm (2-path con).…”

Section: Introductionmentioning

confidence: 99%

A Template for Implementing Fast Lock-free Trees Using HTM

Brown

2017

Proceedings of the ACM Symposium on Principles of Distributed Computing

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Algorithms that use hardware transactional memory (HTM) must provide a software-only fallback path to guarantee progress. The design of the fallback path can have a profound impact on performance. If the fallback path is allowed to run concurrently with hardware transactions, then hardware transactions must be instrumented, adding significant overhead. Otherwise, hardware transactions must wait for any processes on the fallback path, causing concurrency bottlenecks, or move to the fallback path. We introduce an approach that combines the best of both worlds. The key idea is to use three execution paths: an HTM fast path, an HTM middle path, and a software fallback path, such that the middle path can run concurrently with each of the other two. The fast path and fallback path do not run concurrently, so the fast path incurs no instrumentation overhead. Furthermore, fast path transactions can move to the middle path instead of waiting or moving to the software path. We demonstrate our approach by producing an accelerated version of the tree update template of Brown et al., which can be used to implement fast lock-free data structures based on down-trees. We used the accelerated template to implement two lock-free trees: a binary search tree (BST), and an (a, b)-tree (a generalization of a B-tree). Experiments show that, with 72 concurrent processes, our accelerated (a, b)-tree performs between 4.0x and 4.2x as many operations per second as an implementation obtained using the original tree update template.

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“…Recent work has identified ways to use hardware transactional memory (HTM) to reduce descriptor allocation [91].…”

Section: Related Workmentioning

confidence: 99%

“…Current (and likely future) implementations of HTM offer no progress guarantees, so one must provide a lock-free fallback path to guarantee lock-free progress. The techniques in [91] accelerate the HTM-based fast path, but do nothing to reduce descriptor allocations on the fallback path. In some workloads, many operations run on the fallback path, so it is important for it to be efficient.…”

Section: Related Workmentioning

confidence: 99%

Techniques for Constructing Efficient Lock-free Data Structures

Brown¹

2017

Preprint

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Building a library of concurrent data structures is an essential way to simplify the difficult task of developing concurrent software. Lock-free data structures, in which processes can help one another to complete operations, offer the following progress guarantee: If processes take infinitely many steps, then infinitely many operations are performed.Handcrafted lock-free data structures can be very efficient, but are notoriously difficult to implement. We introduce numerous tools that support the development of efficient lock-free data structures, and especially trees.We address the difficulty of using single-word compare-and-swap (CAS) to develop lock-free graph-based data structures by introducing multiword synchronization primitives called LLX and SCX. These primitives fall between multi-compare-single-swap and full multiword-CAS in expressiveness, and can be implemented much more efficiently than multiword-CAS. We use them to implement a tree update template that can be followed to produce lock-free implementations of arbitrary updates in down-trees, and use this template to produce the first lock-free implementations of several advanced trees: chromatic search trees, relaxed AVL trees, and relaxed (a, b)-trees. We also introduce a new variant of a B-tree, called a relaxed B-slack tree, which has significantly better worst-case space complexity, and produce a lock-free implementation using our template.In these implementations, operations dynamically allocate memory for nodes. Additionally, in our implementation of LLX and SCX, each SCX operation allocates a descriptor, which contains information that another process can use to help the SCX operation complete. These implementations must perform dynamic lock-free memory reclamation, but traditional lock-free memory reclamation algorithms are either inefficient or cannot be used with our implementations. So, we introduce a fast epoch-based reclamation (EBR) algorithm called DEBRA+, which is the first lock-free EBR algorithm that can be used with trees.We also devise two techniques for accelerating lock-free data structure implementations. Using the first technique, we can efficiently eliminate dynamic allocation and reclamation of descriptors in SCX, and a large class of other algorithms. Using the second, we exploit hardware transactional memory support in modern processors to produce accelerated implementations of the template.ii According to an old African proverb, it takes a village to raise a child. Similarly, it takes an academic community to train a researcher. Over the last few years, I have been fortunate to be surrounded by many brilliant, friendly and helpful people. I would first like to express my gratitude to my supervisor Faith Ellen. She taught me the importance of laying a rigorous theoretical foundation, completely transformed my writing, encouraged me when I would otherwise have given up on a hard problem, and continually surprised me with her keen insights. I would also like to thank Eric Ruppert, who served as a mentor and research supervi...

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Transactional Acceleration of Concurrent Data Structures

Cited by 4 publications

References 50 publications

Improving Parallelism in Hardware Transactional Memory

Improving Parallelism in Hardware Transactional Memory

A Template for Implementing Fast Lock-free Trees Using HTM

Techniques for Constructing Efficient Lock-free Data Structures

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