Traffic Allocation: An efficient adaptive network-on-chip routing algorithm design

Wang, Nan; Valencia, Pedro

doi:10.1109/compcomm.2016.7925054

Cited by 10 publications

(6 citation statements)

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“…Its versatility has been successfully demonstrated across various wireless system developments, including 802.11 and LTE domains-proving its effectiveness transcends different applications. In a different study [83], researchers proposed the Traffic Allocation routing algorithm as a viable solution to address the challenges faced in developing efficient routing algorithms for the NoC architectures. This innovative algorithm integrates traffic allocation registers and leverages local computations to evaluate traffic loads, resulting in improved performance when compared with existing algorithms.…”

Section: Workload Distributionmentioning

confidence: 99%

Routing Techniques in Network-On-Chip Based Multiprocessor-System-on-Chip for IOT: A Systematic Review

Muhsen,

Azura Husin,

Binti Zolkepli

et al. 2024

Iraqi Journal For Computer Science and Mathematics

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Routing techniques (RTs) play a critical role in modern computing systems that use network-on-chip (NoC) communication infrastructure within multiprocessor system-on-chip (MPSoC) platforms. RTs contribute greatly to the successful performance of NoC-based MPSoCs due to traffic congestion avoidance, quality-of-service assurance, fault handling and optimisation of power usage. This paper outlines our efforts to catalogue RTs, limitations, recommendations and key challenges associated with these RTs used in NoC-based MPSoC systems for the IoT domain. We utilized the PRISMA method to collect data from credible resources, including IEEE Xplore ®, ScienceDirect, Association for Computing Machinery and Web of Science. Out of the 906 research papers reviewed, only 51 were considered relevant to the investigation on NoC RTs. The study addresses issues related to NoC routing and suggests new approaches for in-package data negotiating. In addition, it gives an overview of the recent research on routing strategies and numerous algorithms that can be used for NoC-based MPSoCs. The literature analysis addresses current obstacles and delineates potential future avenues, recommendations, and challenges analyzing techniques to assess performance utilizing metrics within the TCCM framework.

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Section: Workload Distributionmentioning

confidence: 99%

Routing Techniques in Network-On-Chip Based Multiprocessor-System-on-Chip for IOT: A Systematic Review

Muhsen,

Azura Husin,

Binti Zolkepli

et al. 2024

Iraqi Journal For Computer Science and Mathematics

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“…Later in phases, it traverses positive and negative sets of the node. Wang and Valencia [117] proposed Traffic Allocation (TA) routing that monitors different direction traffic flow information of a router and maintains registers to store each direction information. This strategy helps distribute traffic more evenly and does not involve additional communication overhead to get neighbor buffer status.…”

Section: A Workload Distributionmentioning

confidence: 99%

Review, Analysis, and Implementation of Path Selection Strategies for 2D NoCs

et al. 2022

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Recent advances in very-large-scale integration (VLSI) technologies have offered the capability of integrating thousands of processing elements onto a single silicon microchip. Multiprocessor systems-on-chips (MPSoCs) are the latest creation of this technology evolution. Network-on-Chip (NoC) is a scalable and promising interconnection solution used by MPSoCs to achieve high performance. Routing algorithms provide a path to a packet toward the destination. For this, these algorithms should exhibit two characteristics. First, the route selection function should provide enough degree of adaptiveness to avoid network congestion. Second, it should not offer stale information on network congestion status to the neighboring routers. Many researchers have investigated network congestion and proposed techniques to control/avoid congestion. Such congestion avoidance-based algorithms significantly improve NoC performance. However, they may result in hardware overhead for side network implementation to collect congestion status. This paper reviews the selection strategies used to reduce congestion in NoC and classifies them on the technique adopted to handle and propagate congestion information. Additionally, this paper provides the implementation and analysis details of some state-of-art selection methods.

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“…The routing algorithms GOAL, GAL, DyXY, BARP, ADBR, MaS, Fault-tolerant, FAFT, FT-DyXY, Free-rider, Novel Adaptive, Traffic allocator, MCAR, Efficient deadlock-free, ESPDA and Adaptive multipath are adaptive routing algorithm [9,[14][15][16][17][18][19][20][21][22][23][24][25][26][27][28]. OE and 3DEP are partial adaptive routing algorithm [29,30].…”

Section: Routing Typementioning

confidence: 99%

“…The power consumption of FT-XY under uniform traffic of 4×4 NoC is .01 to .09 J and for 6×6 NoC its .02 to .09 J for injection rate of .005 to .019 packet/cycle/node [33]. The power consumption for ADBR is .00035J, for MaS algorithm it's a 6.5w at injection rate of 0.21 packet/cycle/node, for Traffic allocation routing algorithm it's 61.973mw when load is 50%, for ZigZig algorithm it's 62.698mw when load is 50% and for Link sharing algorithm it's 2.86mw [17,19,24,34,50].…”

Section: Power Dissipationmentioning

confidence: 99%