2008
DOI: 10.1109/ted.2007.910619
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Tradeoff Characteristics Between Resistivity and Reliability for Scaled-Down Cu-Based Interconnects

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Cited by 26 publications
(13 citation statements)
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“…We previously reported on the relationship between line resistivity and EM reliability in Cu alloy interconnects and metal-capped Cu interconnects paying attention to the effect of impurity doping with 90-nm-node technology. 2) We showed that Cu alloy interconnects improved EM reliability and increased line resistivity owing to doped impurities, while metal-capped Cu interconnects showed improvement of EM reliability and suppressed resistivity increase. Furthermore, it has been reported that as lines narrow, the effect of grain boundary diffusion on EM becomes large and EM lifetime decreases owing to a small Cu grain size.…”
Section: Introductionmentioning
confidence: 81%
See 1 more Smart Citation
“…We previously reported on the relationship between line resistivity and EM reliability in Cu alloy interconnects and metal-capped Cu interconnects paying attention to the effect of impurity doping with 90-nm-node technology. 2) We showed that Cu alloy interconnects improved EM reliability and increased line resistivity owing to doped impurities, while metal-capped Cu interconnects showed improvement of EM reliability and suppressed resistivity increase. Furthermore, it has been reported that as lines narrow, the effect of grain boundary diffusion on EM becomes large and EM lifetime decreases owing to a small Cu grain size.…”
Section: Introductionmentioning
confidence: 81%
“…As the ways to achieve highly reliable Cu interconnects, applications of Cu alloy interconnects and metalcapped Cu interconnects have been proposed. 2) Cu alloy interconnects are fabricated by doping impurities from a Cu alloy seed layer or a barrier metal layer. As a seed layer, CuAl, [3][4][5] CuMn, 6,7) and CuSn 8,9) have been used, whereas as a barrier metal layer, Ti-based layers 10,11) have been used.…”
Section: Introductionmentioning
confidence: 99%
“…This native oxide would be reduced to copper in the case of direct deposition of the dielectric cap. The second contribution might be related to the change of the surface scattering for a CoWP interface compared to the interface with a dielectric material [10]. Diffusion of Co into the copper might also contribute to the resistance increase since a number of high temperatures steps are part of the dual damascene process flow.…”
Section: Electrical Performance and Reliabilitymentioning
confidence: 99%
“…[3][4][5] To overcome the issue of EM degradation, several advanced process technologies, labeled ''EM boosters'', have been proposed. However, the trade-off of improving the EM is an increase in resistivity, [6][7][8][9][10] which contributes to a temperature increase due to JH. In order to permit a higher current density limit with a long lifetime, establishing a method for evaluating JH is required.…”
Section: Introductionmentioning
confidence: 99%