Abstract:In this article we address the reshuffle of the design of optimistic simulation kernels in order to fit multi-core/multiprocessor machines. This is done by providing a reference optimistic simulation architecture based on the symmetric multithreaded paradigm, where each simulation kernel instance is allowed to run a dynamically changing set of worker threads that share the whole load of LPs hosted by that kernel, and that can run both application-level event handlers and kernellevel housekeeping tasks. With th… Show more
“…We consider the availability of C cores, and complying with the organization in [16], we assume K worker threads (K ≤ C) are available for event processing. To determine what LPs should be bound to the available worker threads, we follow these steps:…”
Section: Policy 1-future Event List and Gvt Advancementmentioning
confidence: 99%
“…Our goal is to give the highest degree of freedom to the programmer, and to ensure an efficient execution of the simulation. We target symmetric-multithread PDES environments for shared-memory multicore systems [16]. LPs are allowed to interact in a twofold way: (i) explicitly, namely via traditional message passing, or (ii) implicitly, i.e.…”
Section: Introductionmentioning
confidence: 99%
“…As discussed in [16], this is a fundamental aspect to offer competitive performance. The binding temporarily assigns computing resources (i.e., worker threads stick to certain cores) to groups of LPs.…”
Section: Introductionmentioning
confidence: 99%
“…In the context of PDES, several works have studied the problem of finding the best binding between LPs and worker threads-see, e.g., [16,25,26,21,27]. Nevertheless, none of these works has ever used information related to the interaction between LPs to explicitly reduce the (possible) negative effects of optimistic simulation runs.…”
Abstract. Execution parallelism in agent-Based Simulation (ABS) allows to deal with complex/large-scale models. This raises the need for runtime environments able to fully exploit hardware parallelism, while jointly offering ABS-suited programming abstractions. In this paper, we target last-generation Parallel Discrete Event Simulation (PDES) platforms for multicore systems. We discuss a programming model to support both implicit (in-place access) and explicit (message passing) interactions across concurrent Logical Processes (LPs). We discuss different load-sharing policies combining event rate and implicit/explicit LPs' interactions. We present a performance study conducted on a synthetic test case, representative of a class of agent-based models.
“…We consider the availability of C cores, and complying with the organization in [16], we assume K worker threads (K ≤ C) are available for event processing. To determine what LPs should be bound to the available worker threads, we follow these steps:…”
Section: Policy 1-future Event List and Gvt Advancementmentioning
confidence: 99%
“…Our goal is to give the highest degree of freedom to the programmer, and to ensure an efficient execution of the simulation. We target symmetric-multithread PDES environments for shared-memory multicore systems [16]. LPs are allowed to interact in a twofold way: (i) explicitly, namely via traditional message passing, or (ii) implicitly, i.e.…”
Section: Introductionmentioning
confidence: 99%
“…As discussed in [16], this is a fundamental aspect to offer competitive performance. The binding temporarily assigns computing resources (i.e., worker threads stick to certain cores) to groups of LPs.…”
Section: Introductionmentioning
confidence: 99%
“…In the context of PDES, several works have studied the problem of finding the best binding between LPs and worker threads-see, e.g., [16,25,26,21,27]. Nevertheless, none of these works has ever used information related to the interaction between LPs to explicitly reduce the (possible) negative effects of optimistic simulation runs.…”
Abstract. Execution parallelism in agent-Based Simulation (ABS) allows to deal with complex/large-scale models. This raises the need for runtime environments able to fully exploit hardware parallelism, while jointly offering ABS-suited programming abstractions. In this paper, we target last-generation Parallel Discrete Event Simulation (PDES) platforms for multicore systems. We discuss a programming model to support both implicit (in-place access) and explicit (message passing) interactions across concurrent Logical Processes (LPs). We discuss different load-sharing policies combining event rate and implicit/explicit LPs' interactions. We present a performance study conducted on a synthetic test case, representative of a class of agent-based models.
“…Vitali et al [32,31] developed a different multi-threaded PDES simulator on multi-core platforms. A load-sharing scheme was implemented, allowing each simulation kernel instance to be executed by multiple threads.…”
As multicore and manycore processor architectures are emerging and the core counts per chip continue to increase, it is important to evaluate and understand the performance and scalability of Parallel Discrete Event Simulation (PDES) on these platforms. Most existing architectures are still limited to a modest number of cores, feature simple designs and do not exhibit heterogeneity, making it impossible to perform comprehensive analysis and evaluations of PDES on these platforms. Instead, in this paper we evaluate PDES using a full-system cycle-accurate simulator of a multicore processor and memory subsystem. With this approach, it is possible to flexibly configure the simulator and perform exploration of the impact of architecture design choices on the performance of PDES. In particular, we answer the following four questions with respect to PDES performance and scalability: (1) For the same total chip area, what is the best design point in terms of the number of cores and the size of the on-chip cache? (2) What is the impact of using in-order vs. out-of-order cores? (3) What is the impact of a heterogeneous system with a mix of in-order and out-oforder cores? (4) What is the impact of object partitioning on PDES performance in heterogeneous systems? To answer these questions, we use MARSSx86 simulator for evaluating performance, and rely on Cacti and McPAT tools to derive the area and latency estimates for cores and caches.
In this paper we present the ROme OpTimistic Simulator (ROOT-Sim), a general-purpose Parallel Discrete Event simulator built according to the optimistic synchronization protocol, which allows-via the adoption of a simple/reduced API-to implement simulation models via event handlers relying on standard ANSI-C. We present the set of paradigms which ROOT-Sim is built on, and its internal design, along with the offered facilities. We also explain the simulation-model programming paradigm, and give an example of a (very basic) simulation model, which stands as a building block for more complex ones. N −1 i=0 S i and S i ∩ S j = ∅, ∀i = j.
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