Towards designing efficient reversible binary code converters and a dual-rail checker for emerging nanocircuits

Misra, Neeraj Kumar; Sen, Bibhash; Wairya, Subodh

doi:10.1007/s10825-017-0960-4

Cited by 22 publications

(5 citation statements)

References 24 publications

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“…The key feature of reversible logic gates is the establishment of a one-to-one mapping between inputs and outputs, enabling the retrieval of outputs from inputs and vice versa (Bennett, 1973). Several reversible gates exist, including the reversible NOT gate (Misra et al, 2017), Feynman gate (FG) (Feynman, 1985), Peres gate (PG) (Peres, 1985), double Peres gate (DPG) (Tara & Babu, 2016), Fredkin gate, Toffoli gate (Fredkin & Toffoli, 1982), controlled V gate and controlled V+ gate (Maity, 2022), and more. In the "controlled-V gate, when input A is '0', the output Q is equal to B. Conversely, if A equals '1', the output Q becomes V(B), where, V is defined as the unitary operation V = i+1 2 ( 1 −i −i 1 ) is applied to the input B. V+ is the Hermitian of V".…”

Section: Basic Conceptsmentioning

confidence: 99%

A New Approach to Design of Cost-Efficient Reversible Quantum Dual-Full Adder and Subtractor

Maity,

Chatterjee,

Biswas

et al. 2024

Int. j. math. eng. manag. sci.

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This paper proposed the design and development of reversible cost-efficient innovative quantum dual-full adder and subtractor or QD-FAS circuit using quantum gate. The proposed circuit can be used as full adder and full subtractor simultaneously, which is designed using double Peres gate or DPG and Feynman gate or FG. The quantum cost, garbage output and constant input of the QD-FAS is 8, 1 and 1. Which is better w.r.t previously reported work. The QD-FAS circuit, as proposed, includes shared sum and difference terminals, as well as a carry-out and a borrow output terminal. Notably, this innovation showcases a remarkable 27.27% reduction in quantum cost. The improvement in garbage output is even more striking, showing a 50% enhancement. When assessing the overall advancement in quantum cost, it falls within the range of 27.27% to 66.66%. To confirm the viability of this design, extensive testing is carried out using the IBM Qiskit simulator. This design holds significant importance in a variety of applications, including quantum computing, cryptography, and the realm of reversible Arithmetic Logic Units (ALU).

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Section: Basic Conceptsmentioning

confidence: 99%

A New Approach to Design of Cost-Efficient Reversible Quantum Dual-Full Adder and Subtractor

Maity,

Chatterjee,

Biswas

et al. 2024

Int. j. math. eng. manag. sci.

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“…A B (A+B)⊕C HAS [54] A A⊕B⊕C AB+AC New Gate [55] A AB⊕C A C⊕B ORG-I [56] AB+(A⊕B)C A⊕B AB+(A⊕B) ORG-II [56] AB+BC AB+BC AB+BC MF [57] A AB+AC AB+AC BG-1 [58] A⊕B B⊕C C GB-1 [58] A⊕B⊕C B⊕C C NG-R2 [59] A A⊕B (A+B)⊕C DG [60] A…”

Section: Analysis Of Various Reversible Gatesmentioning

confidence: 99%

Reversible Gates: A Paradigm Shift in Computing

Naz

Shah

2023

IEEE Open J. Circuits Syst.

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The reversible gate has been one of the emerging research areas that ensure a continual process of innovation trends that explore and utilizes the resources. This review paper provides a comprehensive overview of reversible gates, including their fundamental principles, design methodologies, and various applications. It also analyzes the reversible gates, comparing them based on metrics such as Quantum Cost, Complexity, and other performance evaluation measures. The analysis of several reversible gates is presented in this paper and provides a comprehensive overview of reversible gates, encompassing their fundamental principles, design methodologies, and diverse applications. Reversible logic circuits allow for the production of both unique outputs and distinct input combinations. The majority of the findings about the reversible gates from previous research papers are discussed and contrasted. All the reversible gates that have been proposed till now are presented in tabular form and the parameters are discussed to help the researchers to find every detail related to the reversible gates. To highlight our understanding, we have ended most of the sections with questions. The inclusion of questions is likely intended to stimulate further discussion and promote a deeper understanding of the material presented in this paper. These questions can serve as prompts for readers to reflect on the content and potentially explore related research directions or areas of improvement.

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“…[4][5][6]. However, quantum states are very fragile and susceptible to external environmental noise, leading to inevitable interactions between qubits and their environment, which can cause a decoherence and errors in qubits [7][8][9]. The development of efficient quantum errorcorrecting codes is the key to overcoming this problem and is an important guarantee for quantum information transmission.…”

Section: Introductionmentioning

confidence: 99%

Convolutional-Neural-Network-Based Hexagonal Quantum Error Correction Decoder

Li,

Gan

et al. 2023

Applied Sciences

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Topological quantum error-correcting codes are an important tool for realizing fault-tolerant quantum computers. Heavy hexagonal coding is a new class of quantum error-correcting coding that assigns physical and auxiliary qubits to the vertices and edges of a low-degree graph. The layout of heavy hexagonal codes is particularly suitable for superconducting qubit architectures to reduce frequency conflicts and crosstalk. Although various topological code decoders have been proposed, constructing the optimal decoder remains challenging. Machine learning is an effective decoding scheme for topological codes, and in this paper, we propose a machine learning heavy hexagonal decoder based on a convolutional neural network (CNN) to obtain the decoding threshold. We test our method on heavy hexagonal codes with code distance of three, five, and seven, and increase it to five, seven, and nine by optimizing the RestNet network architecture. Our results show that the decoder thresholding accuracies are about 0.57% and 0.65%, respectively, which are about 25% higher than the conventional decoding scheme under the depolarizing noise model. The proposed decoding architecture is also applicable to other topological code families.

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Towards designing efficient reversible binary code converters and a dual-rail checker for emerging nanocircuits

Cited by 22 publications

References 24 publications

A New Approach to Design of Cost-Efficient Reversible Quantum Dual-Full Adder and Subtractor

A New Approach to Design of Cost-Efficient Reversible Quantum Dual-Full Adder and Subtractor

Reversible Gates: A Paradigm Shift in Computing

Convolutional-Neural-Network-Based Hexagonal Quantum Error Correction Decoder

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