Abstract:The power distribution network (PDN) is an increasingly significant consumer of on-chip interconnect resources. Thus, PDN estimation is increasingly central to system-level interconnect prediction for modern ICs. PDN design and verification require accurate power estimation and realistic current source distribution across a die. However, at early design stages, detailed placement or switching information is rarely available, so that designers either rely on pessimistic overdesign, which can lead to severe rout… Show more
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