Toward efficient and robust software speculative parallelization on multiprocessors

Cintra, Marcelo; Llanos, Diego R.

doi:10.1145/781499.781501

Cited by 23 publications

(63 citation statements)

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“…[24,28,40], through the design of specific chips, or the addition of some functionalities. But there are also several software approaches that support the mentioned parallelism with no architectural changes [8,22,25,42]. In this work, we will describe some of the software approaches, and propose a number of possible hardware additions which might improve the performance of TLS on the Intel Xeon Phi coprocessors.…”

Section: Tls Approachesmentioning

confidence: 99%

“…Cintra and Llanos [8,9] developed another scheme mainly based on an aggressive sliding window, with checks for data dependence violations on speculative stores that reduced synchronization constraints, and with fine-tuned data structures.…”

Section: Software Branchmentioning

confidence: 99%

“…Thread-level speculation (TLS) [8,34,35,42], also called speculative parallelization (SP) [14,18,22,46] or optimistic parallelism [25,26] tries to extract parallelism of loops that can not be considered fully parallel at compile time. TLS optimistically assumes that dependence violations will not occur, launching the parallel execution of the loop.…”

Section: Introductionmentioning

confidence: 99%

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Using the Xeon Phi Platform to Run Speculatively-Parallelized Codes

Estebanez

Llanos

González-Escribano

2016

Int J Parallel Prog

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Intel Xeon Phi accelerators are one of the newest devices used in the field of parallel computing. However, there are comparatively few studies concerning their performance when using most of the existing parallelization techniques. One of them is thread-level speculation, a technique that optimistically tries to extract parallelism of loops without the need of a compile-time analysis that guarantees that the loop can be executed in parallel. In this article we evaluate the performance delivered by an Intel Xeon Phi coprocessor when using a software, state-of-the-art thread-level speculative parallelization library in the execution of well-known benchmarks. We describe both the internal characteristics of the Xeon Phi platform and the particularities of the thread-level speculation library being used as benchmark. Our results show that, although the Xeon Phi delivers a relatively good speedup in comparison with a sharedmemory architecture in terms of scalability, the relatively low computing power of its computational units when specific vectorization and SIMD instructions are not fully exploited makes this first generation of Xeon Phi architectures not competitive (in terms of absolute performance) with respect to conventional multicore systems for the execution of speculatively parallelized code.

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Section: Tls Approachesmentioning

confidence: 99%

Section: Software Branchmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Using the Xeon Phi Platform to Run Speculatively-Parallelized Codes

Estebanez

Llanos

González-Escribano

2016

Int J Parallel Prog

Self Cite

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“…Most solutions suggested in the literature use a simple helper thread which, when triggered, prefetches a single data item, and then terminates [5,11,15]. This thread is started by inserting explicit instructions of thread creation and management into the main thread increasing its complexity and introducing overhead.…”

Section: General Schemementioning

confidence: 99%

Software Controlled Adaptive Pre-Execution for Data Prefetching

Dudás

Juhász

Schrádi

2011

Int J Parallel Prog

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Data prefetching mechanisms are widely used for hiding memory latency in data intensive applications. They mask the speed gap between CPUs and their memory systems by preloading data into the CPU caches, where accessing them is by at least one order of magnitude faster. Pre-execution is a combined prefetching method, which executes a slice of the original code preloading the code and its data at the same time. Pre-execution is often mentioned in the literature, but according to our knowledge, it has not been formally defined yet. We fill this void by presenting the formal definition of speculative and non-speculative pre-execution, and derive a lightweight software-based strategy which accelerates the main working thread by introducing an adaptive, non-speculative pre-execution helper thread. This helper thread acts as a perfect predictor, calculates memory addresses, prefetches the data and consumes cache misses early. The adaptive automatic control allows the helper thread to configure itself in run-time for best performance. The method is directly applicable to any data intensive application without requiring hardware modifications. Our method was able to achieve an average speedup of 10-30% in a real-life application.

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“…Thread-Level Speculation (TLS) [2,3] is a runtime technique that can be used to run loops in parallel that may present dependency violations. TLS optimistically assumes that the code can be executed in parallel, relying on a runtime monitor to ensure correctness.…”

Section: Introductionmentioning

confidence: 99%

BFCA+: automatic synthesis of parallel code with TLS capabilities

2016

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Parallelization of sequential applications requires extracting information about the loops and how their variables are accessed, and afterwards, augmenting the source code with extra code depending on such information. In this paper we propose a framework that avoids such an error-prone, time-consuming task. Our solution leverages the compile-time information extracted from the source code to classify all variables used inside each loop according to their accesses. Then, our system, called BFCA+, automatically instruments the source code with the necessary OpenMP directives and clauses to allow its parallel execution, using the standard shared and private clauses for variable classification. The framework is also capable of instrumenting loops for speculative parallelization, with the help of the ATLaS runtime system, that defines a new speculative clause to point out those variables that may lead to a dependency violation. As a result, the target loop is guaranteed to correctly run in parallel, ensuring that its execution follows sequential semantics even in the presence of dependency violations. Our experimental evaluation shows that the framework not only saves development time, but also leads to a faster code than the one manually parallelized.

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Toward efficient and robust software speculative parallelization on multiprocessors

Cited by 23 publications

References 0 publications

Using the Xeon Phi Platform to Run Speculatively-Parallelized Codes

Using the Xeon Phi Platform to Run Speculatively-Parallelized Codes

Software Controlled Adaptive Pre-Execution for Data Prefetching

BFCA+: automatic synthesis of parallel code with TLS capabilities

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