TOSAM: An Energy-Efficient Truncation- and Rounding-Based Scalable Approximate Multiplier

Vahdat, Shaghayegh; Kamal, Mehdi; Afzali-Kusha, Ali; Pedram, Massoud

doi:10.1109/tvlsi.2018.2890712

Cited by 118 publications

(86 citation statements)

References 23 publications

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“…The authors managed to reduce the delay and energy compared to the DRUM multiplier. The design by Zendagani et al [24] has been improved by Vahdat et al [25], where the authors have combined truncation and rounding to deliver an efficient approximate multiplier design with significant reductions in area, energy consumption, and delay compared to the exact multiplier. On the other hand, the proposed approach exhibits significant mean relative error that can go up to 11%.…”

Section: A Approximate Logarithmic Multipliersmentioning

confidence: 99%

On the Design of Logarithmic Multiplier Using Radix-4 Booth Encoding

Pilipović

Bulić

2020

IEEE Access

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This paper proposes an energy-efficient approximate multiplier which combines radix-4 Booth encoding and logarithmic product approximation. Additionally, a datapath pruning technique is proposed and studied to reduce the hardware complexity of the multiplier. Various experiments were conducted to evaluate the multiplier's error performance and efficiency in terms of energy and area utilization. The reported results are based on simulations using TSMC-180nm. Also, the applicability of the proposed multiplier is examined in image sharpening and convolutional neural networks. The applicability assessment shows that the proposed multiplier can replace an exact multiplier and deliver up to a 75% reduction in energy consumption and up to a 50% reduction in area utilization. Comparative analysis with the state-of-the-art multipliers indicates the potential of the proposed approach as a novel design strategy for approximate multipliers. When compared to the state-of-the-art approximate non-logarithmic multipliers, the proposed multiplier offers smaller energy consumption with the same level of applicability in image processing and classification applications. On the other hand, some state-of-the-art approximate logarithmic multipliers exhibit lower energy consumption than the proposed multiplier but deliver significant performance degradation for the selected application cases. INDEX TERMS Approximate computing, arithmetic circuit design, booth encoding, logarithmic multipliers, multipliers, power-efficient processing, truncated multipliers.

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Section: A Approximate Logarithmic Multipliersmentioning

confidence: 99%

On the Design of Logarithmic Multiplier Using Radix-4 Booth Encoding

Pilipović

Bulić

2020

IEEE Access

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“…This provides a comparison between a high precession multiplier (the DSM) and lower power and area one (the SSM). The DSM based multiplier using DRUM's design [7] can provide notably high accuracy, although it has a larger area and energy consumption compared to other multipliers such as [6] and [8][9]. On the other hand, the SSM based multiplier [6] has a more efficient circuit compared to other approximate multipliers such as [7][8][9].…”

Section: Segment Based Approximate Multipliersmentioning

confidence: 99%

“…Improving the performance by increasing the speed and lowering the power allows for reducing the energy consumption per operation. Several approximate multiplier designs have been proposed in the literature such as [6][7][8][9][10][11][12].…”

Section: Introductionmentioning

confidence: 99%

CNN Inference Using a Preprocessing Precision Controller and Approximate Multipliers With Various Precisions

Hammad

El‐Sankary

et al. 2021

IEEE Access

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“…Hashemi et al [5] proposed a dynamic and fast bit selection scheme to reduce the size of multipliers. Vahdat et al [10] proposed a scalable approximate sequential multiplier which reduces the number of partial products by truncating each of the input operands based on their leading-one bit position. In [7,11], smaller approximate and low-power multipliers are first designed, and then, they are used as basic building blocks to form larger multipliers.…”

Section: Related Workmentioning

confidence: 99%

AxCEM: Designing Approximate Comparator-Enabled Multipliers

Ghabraei

Rezaalipour

Dehyadegari

et al. 2020

JLPEA

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Floating-point multipliers have been the key component of nearly all forms of modern computing systems. Most data-intensive applications, such as deep neural networks (DNNs), expend the majority of their resources and energy budget for floating-point multiplication. The error-resilient nature of these applications often suggests employing approximate computing to improve the energy-efficiency, performance, and area of floating-point multipliers. Prior work has shown that employing hardware-oriented approximation for computing the mantissa product may result in significant system energy reduction at the cost of an acceptable computational error. This article examines the design of an approximate comparator used for preforming mantissa products in the floating-point multipliers. First, we illustrate the use of exact comparators for enhancing power, area, and delay of floating-point multipliers. Then, we explore the design space of approximate comparators for designing efficient approximate comparator-enabled multipliers (AxCEM). Our simulation results indicate that the proposed architecture can achieve a 66% reduction in power dissipation, another 66% reduction in die-area, and a 71% decrease in delay. As compared with the state-of-the-art approximate floating-point multipliers, the accuracy loss in DNN applications due to the proposed AxCEM is less than 0.06%.

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TOSAM: An Energy-Efficient Truncation- and Rounding-Based Scalable Approximate Multiplier

Cited by 118 publications

References 23 publications

On the Design of Logarithmic Multiplier Using Radix-4 Booth Encoding

On the Design of Logarithmic Multiplier Using Radix-4 Booth Encoding

CNN Inference Using a Preprocessing Precision Controller and Approximate Multipliers With Various Precisions

AxCEM: Designing Approximate Comparator-Enabled Multipliers

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