Topological mapping formation in a neural network with variations of device characteristics

Abstract

The neural network of a human brain can well perform higher-order-information processing which could not be achieved by Neuman-type computers. In order to perform the processing, it is necessary to fabricate artificial neural systems which can form the topological mapping through learning. A new learning algorithm and a new network model have been proposed for fabrication by means of CMOS analog circuits with variations of device characteristics. The functions of those circuits were confirmed by means of SPICE simulations and the functions of PDM (pulse density modulator} were confirmed experimentally. The learning simulations of the network consisting of the circuits have also been carried out. The results show that the topological mapping is almost formed, even when variations of device characteristics exist in the neural network. The results also reveal that calculating the weighted sum of each neuron's potential and potentials of its surrounding neurons as the output of each neuron and adding proper number of redundant neurons to the output layer are effective mechanisms for the network with variations of device characteristics. 1: IntroductionThe neural network of a human brain can well perform higher-order-information processing such as recognition, decision, dispersive memorization and self-organization, which could not be achieved by Neuman-type computers. The human interface of future computer systems should be more comfortable by applying such functions to the computer systems. Higher-order-information processing functions of the human brain are realized by a super-parallel computation mechanism that carries out a feature extraction and aggregation process. Human being can perform such super-parallel computations because topological mapping in a seif-organized manner is formed in the brain.Topological mapping is a mechanism for feature extraction in which neurons responding to similar input patterns are arranged in near places. Therefore, in order to realize the higher-order information processing, it is essential to fabricate a hardware which can form the topological mapping through learning. However, hardwares which have 1086-1947/96 $5.00 0 1996 IEEE Proceedings of MicroNeuro '96 a high probability of forming the topological mapping have not been realized so far.It was shown by T. Kohonen [ 1 1 that the topological mapping is formed by means of following two mechanisms. The 1 st mechanism is to correct synaptic weights based on the Hebbian rule in a winner neuron selected by WinnerTake-All (WTA) mechanism and neighboring neurons. The 2nd mechanism is to prevent the divergence of synaptic weights.In our previous work 121, we fabricated a hardware network with above mechanisms consisting of optoelectronic adaptive devices (OADs) and WTA circuit, in which synaptic weights of only winner were corrected.We also confirmed that the hardware network classified four input patterns. However, the topological mapping is not always formed even when the synaptic-weight correction mechanism is applied to neighbori...