To use or not to use the goto statement: Programming styles viewed from Hoare Logic

Kondoh, Hidetaka; Futatsugi, Kokichi

doi:10.1016/j.scico.2005.05.003

Cited by 3 publications

(4 citation statements)

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“…MISRA guidelines do not recommend the use of goto and continue statements to promote structured programming practices. On the other hand, many studies [Knuth 1974;McConell 2004;Kondoh and Futatsugi 2006] have argued that judicious use of gotos is beneficial for many types of common programming problems. Embedded programmers still make heavy use of constructs such as gotos.…”

Section: Assumptionsmentioning

confidence: 99%

A regression test selection technique for embedded software

Biswas

Mall

Satpathy

2013

ACM Trans. Embed. Comput. Syst.

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The current approaches for regression test selection of embedded programs are usually based on dataand control-dependency analyses, often augmented with human reasoning. Existing techniques do not take into account additional execution dependencies which may exist among code elements in such programs due to features such as tasks, task deadlines, task precedences, and intertask communications. In this context, we propose a model-based regression test selection technique for such programs. Our technique first constructs a graph model of the program; the proposed graph model has been designed to capture several characteristics of embedded programs, such as task precedence order, priority, intertask communication, timers, exceptions and interrupt handlers, which we consider important for regression-test selection. Our regression test selection technique selects test cases based on an analysis of the constructed graph model. We have implemented our technique to realize a prototype tool. The experimental results obtained using this tool show that, on average, our approach selects about 28.33% more regression test cases than those selected by a traditional approach. We observed that, on average, 36.36% of the fault-revealing test cases were overlooked by the existing regression test selection technique. ACM Reference Format:Biswas, S., Mall, R., and Satpathy, M. 2013. A regression test selection technique for embedded software.

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Section: Assumptionsmentioning

confidence: 99%

A regression test selection technique for embedded software

Biswas

Mall

Satpathy

2013

ACM Trans. Embed. Comput. Syst.

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“…The main result of this chapter is presented in Section 3.2.5 that proves that the translation to the normal form is not possible without adding additional variables to the programs in general. The reason therefore is that there are some combinations of statements that introduce problems similar to the goto statement in sequential programs [Dijk68,KoFu06]. Besides the general transformation, two transformations for restricted classes of synchronous programs are given in Section 3.2.6 where it is not necessary to introduce the additional variables.…”

Section: Chapter 3 Interactive Verification Of Synchronous Programs Amentioning

confidence: 99%

“…As goto statements are considered harmful for structured programming [Dijk68,Dijk72], a reduction that works without these additional variables is desired. Moreover, the introduction of these variables is often unnecessary and it makes the verification by the Hoare calculus more difficult [KoFu06]. In particular, these assignments complicate the required invariants that the user must provide during the verification.…”

Section: Comparing a Simple And A Manual Ssta Transformationmentioning

confidence: 99%

“…However, this program transformation requires the introduction of new local variables to translate the control flow to the data flow. This creates problems for the verification task as described in [KoFu06]. In particular, goto statements are simulated by assigning a corresponding local variable a value that encodes a particular location of the program.…”

Section: Impossibility Of Transforming General Quartz Programs To Sstmentioning

confidence: 99%

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Interactive verification of synchronous systems

Gesell

Schneider

2012

Tenth ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMCODE2012)

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Embedded systems, ranging from very simple systems up to complex controllers, may nowadays have quite challenging real-time requirements. Many embedded systems are reactive systems that have to respond to environmental events and have to guarantee certain real-time constrain. Their execution is usually divided into reaction steps, where in each step, the system reads inputs from the environment and reacts to these by computing corresponding outputs.The synchronous Model of Computation (MoC) has proven to be well-suited for the development of reactive real-time embedded systems whose paradigm directly reflects the reactive nature of the systems it describes. Another advantage is the availability of formal verification by model checking as a result of the deterministic execution based on a formal semantics. Nevertheless, the increasing complexity of embedded systems requires to compensate the natural disadvantages of model checking that suffers from the well-known state-space explosion problem. It is therefore natural to try to integrate other verification methods with the already established techniques. Hence, improvements to encounter these problems are required, e.g., appropriate decomposition techniques, which encounter the disadvantages of the model checking approach naturally. But defining decomposition techniques for synchronous language is a difficult task, as a result of the inherent parallelism emerging from the synchronous broadcast communication.Inspired by the progress in the field of desynchronization of synchronous systems by representing them in other MoCs, this work will investigate the possibility of adapting and use methods and tools designed for other MoC for the verification of systems represented in the synchronous MoC. Therefore, this work introduces the interactive verification of synchronous systems based on the basic foundation of formal verification for sequential programs -the Hoare calculus. Due to the different models of computation several problems have to be solved. In particular due to the large amount of concurrency, several parts of the program are active at the same point of time. In contrast to sequential programs, a decomposition in the Hoare-logic style that is in some sense a symbolic execution from one control flow location to another one requires the consideration of several flows here. Therefore, different approaches for the interactive verification of synchronous systems are presented.Additionally, the representation of synchronous systems by other MoCs and the influence of the representation on the verification task by differently embedding synchronous system in a single verification tool are elaborated.The feasibility is shown by integration of the presented approach with the established model checking methods by implementing the AIFProver on top of the Averest system.

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