TIP: A Temperature Effect Inversion-Aware Ultra-Low Power System-on-Chip Platform

Han, Kyuseung; Lee, Sukho; Lee, Jaejin; Lee, Woo-Joo; Pedram, Massoud

doi:10.1109/islped.2019.8824925

Cited by 11 publications

(12 citation statements)

References 15 publications

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“…For instance, as shown in Figure 4, the conventional DPWM with 6-bit resolution [9] includes 64 DFFs. Considering the high resolution required for the aforementioned special low power methods [2,[5][6][7][8], the power and area overhead due to the large number of DFFs can be considerable. In addition, as the number of DFFs increases, the fan-out of each signal increases, which gives rise to power and area overhead increase.…”

Section: Issues On Conventional Pwm Designsmentioning

confidence: 99%

“…Ultra-low power (ULP) IoT platforms are drawing attention from academia [1,2] and industry [3,4] by offering the most practical solution on how to extend the service life of IoT devices under limited small energy sources such as thin film batteries, photovoltaic cells, and thermoelectric generators. These ULP IoT platforms rely on ultra-low voltage (ULV) operation with near-/sub-threshold voltage operating circuits, in which power consumption can be up to several hundred times lower than the nominal voltage operating circuits.…”

Section: Introductionmentioning

confidence: 99%

“…These ULP IoT platforms rely on ultra-low voltage (ULV) operation with near-/sub-threshold voltage operating circuits, in which power consumption can be up to several hundred times lower than the nominal voltage operating circuits. Furthermore, recent studies on the ULV operation-specialized low power methods such as applying voltage scaling [2,5], body biasing [6,7], and power gating and frequency scaling (PGFS) [8] techniques to the ULV operating platforms have achieved significant power savings, driving the evolution of IoT platforms.…”

Section: Introductionmentioning

confidence: 99%

“…This DC-DC converter must be able to operate not only at nominal voltage (e.g., 1.2 V) and but also in the ULV (e.g., 0.6 V) range, support low output voltage conversion, have a very high voltage control resolution, and be designed to show high power conversion efficiency (η) over a wide range of load conditions. For example, if a small PV cell with a 0.7 V output voltage powers our prototype ULV operating platform [2] that operates at 20 MHz to 100 MHz clock speed from 0.4 V to 0.6 V supply, the DC-DC converter must work at 0.7 V supply and support up to 0.4 V voltage conversion. Plus, to achieve full power savings from the voltage and/or frequency scaling technique as a result of [2], the DC-DC converter should support at least 10 mV level of voltage controllability and have a high η range in load power from tens of µW to several mW.…”

Section: Introductionmentioning

confidence: 99%

“…For example, if a small PV cell with a 0.7 V output voltage powers our prototype ULV operating platform [2] that operates at 20 MHz to 100 MHz clock speed from 0.4 V to 0.6 V supply, the DC-DC converter must work at 0.7 V supply and support up to 0.4 V voltage conversion. Plus, to achieve full power savings from the voltage and/or frequency scaling technique as a result of [2], the DC-DC converter should support at least 10 mV level of voltage controllability and have a high η range in load power from tens of µW to several mW.…”

Section: Introductionmentioning

confidence: 99%

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Design of a DC–DC Converter Customized for Ultra-Low Voltage Operating IoT Platforms

Hwang¹,

Yoo²,

Thai³

et al. 2020

Energies

Self Cite

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With remarkable advances in IoT, big data, and AI, the fourth industrial revolution is upon us. Low power design methodologies and techniques have been greatly contributing to these advancements by addressing the critical issue of how to increase the device service life under a fixed and limited energy source. In particular, ultra-low power (ULP) technology, which exploits ultra-low voltage (ULV) operating circuit, has recently emerged as a cutting-edge technology for realizing ULP devices. Although a number of studies on ULV circuits have been made so far, and the results have been very successful, research on DC–DC converters optimized for the ULV operation must be carried out in order to use them ultimately in ULP devices. In this paper, a DC–DC converter with low power, small area, and high-resolution digital pulse width modulator (DPWM) for ultra-low voltage (ULV) operating IoT platforms is presented. The proposed DPWM design uses a much smaller number of D flip-flops than conventional ones, achieving significant power saving and area reduction while showing excellent resolution of power conversion. In addition, by utilizing the proposed DPWM, the DC–DC converters can take full advantage of the dynamic switch width modulation technology without overhead, greatly improving the power conversion efficiency under ultra light load conditions. A prototype DC–DC converter with the proposed DPWM is fabricated in Samsung 65nm technology, and the experimental work with this converter and a target ULV operating platform demonstrates that this converter is best suited for the target platform.

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Section: Issues On Conventional Pwm Designsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 3 more Smart Citations

Design of a DC–DC Converter Customized for Ultra-Low Voltage Operating IoT Platforms

Hwang¹,

Yoo²,

Thai³

et al. 2020

Energies

Self Cite

View full text Add to dashboard Cite

show abstract

Day–Night architecture: Development of an ultra-low power RISC-V processor for wearable anomaly detection

Choi,

Park,

Lee

et al. 2024

Journal of Systems Architecture

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Developing a Multicore Platform Utilizing Open RISC-V Cores

et al. 2021

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RISC-V has been experiencing explosive growth since its first appearance in 2011. Dozens of free and open cores developed based on this instruction set architecture have been released, and RISC-V based devices optimized for specific applications such as the IoT and wearables, embedded systems, AI, and virtual, augmented reality are emerging. As the RISC-V cores are being used in various fields, the demand for multicore platforms composed of RISC-V cores is also rapidly increasing. Although there are various RISC-V cores developed for each specific application, and it seems possible to pick them up to create the most optimized multicore for the target application, unfortunately it is very difficult to realize this in reality. This is mainly because most open cores are released in the form of a single core without cache coherence logic, which requires expensive design effort and development costs to address it. To tackle this issue, this paper proposes a method to solve the cache coherence problem without additional effort from the developer and to maximize the performance of the multicore composed of the RISC-V core selected by the developer. Along with a description of the sophisticated operating mechanisms of the proposed method, this paper details the architecture and hardware implementation of the proposed method. Experiments conducted through the prototype development of a RISC-V multicore platform involving the proposed architecture and development of an application running on the platform demonstrate the effectiveness of the proposed method.INDEX TERMS Multicore platform, RISC-V, system-on-chip (SoC), electronic design automation (EDA)

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TIP: A Temperature Effect Inversion-Aware Ultra-Low Power System-on-Chip Platform

Cited by 11 publications

References 15 publications

Design of a DC–DC Converter Customized for Ultra-Low Voltage Operating IoT Platforms

Design of a DC–DC Converter Customized for Ultra-Low Voltage Operating IoT Platforms

Day–Night architecture: Development of an ultra-low power RISC-V processor for wearable anomaly detection

Developing a Multicore Platform Utilizing Open RISC-V Cores

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