Timing-driven partitioning for two-phase domino and mixed static/domino implementations

Abstract

Domino logic is a high-performance circuit configuration that is usually embedded in static logic environment and tightly coupled with the clocking scheme. In this paper, the timing-driven partitioning algorithms that partition a logic network between (1) static and domino implementations, and (2) the phases of a twophase clock, are provided. In addition, an efficient static mapping algorithm is described.