DOI: 10.3990/1.9789036540193
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Time-interleaved high speed D/A converters

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Cited by 3 publications
(1 citation statement)
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“…In general, the CS-DAC has both static and dynamic errors. However, in this paper, we consider modern time-interleaved architectures that suppress dynamic errors by hiding code transitions from the output [5]. The work in [6] provides a machine learning-based procedure to calibrate interleaving effects for such architectures.…”
Section: Introductionmentioning
confidence: 99%
“…In general, the CS-DAC has both static and dynamic errors. However, in this paper, we consider modern time-interleaved architectures that suppress dynamic errors by hiding code transitions from the output [5]. The work in [6] provides a machine learning-based procedure to calibrate interleaving effects for such architectures.…”
Section: Introductionmentioning
confidence: 99%