Time dependent hot-carrier induced interface state generation in deep submicron LDD nMOSFETs

Kim, Shi-Ho; Min, Kyeong‐Sik; Lee, Kwyro

doi:10.1016/0038-1101(95)00074-7

Cited by 7 publications

(2 citation statements)

References 12 publications

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“…Our model is able to describe the time behavior of the interface state generation and is essentially different from that of Kim et al [10]. It model enables us to predict interface state generation in NMOSFETs for different bias conditions and geometries, based upon two (constant) parameters A=229pA and C=8.14, which hold for all our experiments so far.…”

Section: Model For Interface States Creation Includingmentioning

confidence: 98%

Comprehensive physical modeling of NMOSFET hot-carrier-induced degradation

Lunenborg¹,

Graaff²,

Mouthaan³

et al.

Proceedings of the 7th European Symposium on Reliability of Electron Devices, Failure Physics and Analysis

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Abstract:The role of hot-carrier-induced interface states in NMOSFETs is discussed. A new model is proposed based on measurements in several 0.7/~m CMOS technologies of different suppliers. Our model for the first time enables accurate interface state prediction over many orders of magnitude in time for all stress conditions under pinch-off and incorporates saturation. It can easily be implemented in a reliability circuit simulator, enabling more accurate NMOSFET parameter degradation calculations (e.g. AIo, Agm etc.).

show abstract

Section: Model For Interface States Creation Includingmentioning

confidence: 98%

Comprehensive physical modeling of NMOSFET hot-carrier-induced degradation

Lunenborg¹,

Graaff²,

Mouthaan³

et al.

Proceedings of the 7th European Symposium on Reliability of Electron Devices, Failure Physics and Analysis

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show abstract

“…Furthermore, recent theoretical studies using the hydrodynamic (HD) and full Langevin-Boltzmann equation (LBE) noise models, demonstrated that the channel noise is dominated by the source-side contribution due to higher impedance field near the source junction[29,51]. Hence, whether the channel noise is dominant by the source or drain side is still controversial.On the other hand, as device aggressively scales down, hot carrier (HC) induced degradation emerges as one of the most serious reliability issues in MOSFETs[52][53][54][55][56]. A clear understanding of hot-carrier effects in actual circuit environment is essential to ensure product reliability in the early stage of process optimization.…”

mentioning

confidence: 99%

High frequency noise in deep-submicrometer silicon mosfets

Su¹

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Comprehensive physical modeling of nmosfet hot-carrier-induced degradation

Lunenborg

Graaff

Mouthaan

et al. 1996

Microelectronics Reliability

View full text Add to dashboard Cite

The role of hot-carrier-induced interface states in NMOSFETs is discussed. A new model is proposed based on measurements in several 0.7/~m CMOS technologies of different suppliers. Our model for the first time enables accurate interface state prediction over many orders of magnitude in time for all stress conditions under pinch-off and incorporates saturation. It can easily be implemented in a reliability circuit simulator, enabling more accurate NMOSFET parameter degradation calculations (e.g. AIo, Agm etc.).

show abstract

Time dependent hot-carrier induced interface state generation in deep submicron LDD nMOSFETs

Cited by 7 publications

References 12 publications

Comprehensive physical modeling of NMOSFET hot-carrier-induced degradation

Comprehensive physical modeling of NMOSFET hot-carrier-induced degradation

High frequency noise in deep-submicrometer silicon mosfets

Comprehensive physical modeling of nmosfet hot-carrier-induced degradation

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