TID effects in deep N-well CMOS monolithic active pixel sensors

Ratti, L.; Andreoli, C.; Gaioni, L.; Manghisoni, M.; Pozzati, E.; Re, V.; Traversi, G.

doi:10.1109/radecs.2008.5782738

Cited by 3 publications

(2 citation statements)

References 16 publications

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“…There is considerable information in the literature relating to ionizing radiation effects on full-scale CIS devices [6] [7][8], conversely there is relatively little information regarding effects on the individual transistors in the context of CMOS imaging devices [9] [10].…”

Section: Discussionmentioning

confidence: 99%

Total ionizing dose effects on I-V and noise characteristics of MOS transistors in a 0.18 μm CMOS Image Sensor process

Greig

Stefanov

Holland

et al. 2013

2013 14th European Conference on Radiation and Its Effects on Components and Systems (RADECS)

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Abstract-This paper presents an investigation into total ionizing dose (TID) effects on I-V and noise characteristics of MOS transistors manufactured in a 0.18 µm CMOS Image Sensor (CIS) process. The CIS are intended for use in space science missions experiencing harsh radiation environments, such as ESA's forthcoming JUICE mission. Devices were therefore irradiated to various TID levels up to 1 Mrad. Following irradiation, significant leakage current and threshold voltage modification was observed, and this was found to be more severe for devices with small channel geometries. Noise spectral density measurements were also performed at the different irradiation steps. Noise in the smaller geometry devices was found to increase following irradiation, whereas for larger devices it was not significantly affected. These findings enable future assessment of the effects of TID on functional and electro-optical characteristics of high performance CIS designs for use in space. Index Terms-CMOS image sensor (CIS), metal oxide semiconductor (MOS) transistor, total ionizing dose (TID).

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Section: Discussionmentioning

confidence: 99%

Total ionizing dose effects on I-V and noise characteristics of MOS transistors in a 0.18 μm CMOS Image Sensor process

Greig

Stefanov

Holland

et al. 2013

2013 14th European Conference on Radiation and Its Effects on Components and Systems (RADECS)

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“…The measured values of the efficiency are fully consistent with device simulations and with the present pixel cell geometry, where the layout of the deep N-well was not optimized with respect to "competitive" N-wells housing PMOSFETs. DNW MAPS were exposed to total ionizing doses of 60 Co γ-rays up to the predicted levels for the ILC vertex detector [10]. Even if no rad-hard design trick was used (such as enclosed NMOS-FETs) the chips remained fully functional after irradiation at 1.1 Mrad, with a limited degradation (∼ 25%) in terms of charge sensitivity and noise.…”

Section: Dnw Maps Experimental Performancementioning

confidence: 99%

Status and perspectives of deep N-well 130 nm CMOS MAPS

2009

J. Inst.

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Deep N-Well (DNW) MAPS were developed in two different flavors to approach the specifications of vertex detectors in dissimilar experimental environments such as the Super B-Factory and the ILC. The first generation of MAPS with on-pixel data sparsification and time stamping capabilities is now available and was tested in a beam for the first time in September 2008. These devices are fabricated in a commercial 130 nm CMOS process, and the triple well structure available in such an ultra-deep submicron technology is exploited by using the deep N-well as the charge-collecting electrode. Because of the high integration density of such a technology, complex digital functions can be included in each pixel, implementing a sparsified readout architecture of the pixel matrix with time stamping. This paper reviews the features of the "ILC class" and "SuperB class" MAPS devices, discussing their different design in terms of pixel pitch, analog signal processing, and digital readout architecture. For SuperB, a data-driven, continuously operating readout scheme was adopted along with a macropixel matrix arrangement, whereas for the ILC the matrix is read out in the long intertrain period. In both versions, the address of hit pixels is transmitted off-chip along with the time stamp. The experimental performance of the chips provides an assessment of the Deep N-Well MAPS potential in view of future applications. The paper also discusses the way forward in the development of these devices, outlining the issues that have to be tackled to design full size Deep N-Well MAPS for actual experiments. These sensors could take advantage from technological advances in microelectronic industry, such as vertical integration. The impact of these new technologies on the design and performance of DNW pixel sensors could be large, with potential benefit for various device features, from the charge collection properties to the digital readout architecture.

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Review of radiation effects leading to noise performance degradation in 100 - nm scale microelectronic technologies

Gaioni²,

Manghisoni

et al. 2008

2008 IEEE Nuclear Science Symposium Conference Record

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TID effects in deep N-well CMOS monolithic active pixel sensors

Cited by 3 publications

References 16 publications

Total ionizing dose effects on I-V and noise characteristics of MOS transistors in a 0.18 μm CMOS Image Sensor process

Total ionizing dose effects on I-V and noise characteristics of MOS transistors in a 0.18 μm CMOS Image Sensor process

Status and perspectives of deep N-well 130 nm CMOS MAPS

Review of radiation effects leading to noise performance degradation in 100 - nm scale microelectronic technologies

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TID effects in deep N-well CMOS monolithic active pixel sensors

Cited by 3 publications

References 16 publications

Total ionizing dose effects on I-V and noise characteristics of MOS transistors in a 0.18 &#x03BC;m CMOS Image Sensor process

Total ionizing dose effects on I-V and noise characteristics of MOS transistors in a 0.18 &#x03BC;m CMOS Image Sensor process

Status and perspectives of deep N-well 130 nm CMOS MAPS

Review of radiation effects leading to noise performance degradation in 100 - nm scale microelectronic technologies

Contact Info

Product

Resources

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Total ionizing dose effects on I-V and noise characteristics of MOS transistors in a 0.18 μm CMOS Image Sensor process

Total ionizing dose effects on I-V and noise characteristics of MOS transistors in a 0.18 μm CMOS Image Sensor process