Threshold Voltage Shift Effect of a-Si:H TFTs Under Bipolar Pulse Bias

Hu, Zhijin; Wang, Lisa Ling; Liao, Congwei; Zeng, Limei; Lee, Chang‐Yeh; Lien, A.; Zhang, Shengdong

doi:10.1109/ted.2015.2481434

Cited by 9 publications

(3 citation statements)

References 25 publications

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“…However, the workable temperature range for a-Si:H TFT based gate driver is a critical issue as the speed and stability are seriously degraded at low and high temperature, respectively [14]- [15]. This is because there is conduction current decrease at lower temperature, while the threshold voltage shift with fast speed for long operation time at high temperature, [16]- [18]. Therefore, new circuit schematic with increased circuit speed is of great importance, to extend applications of a-Si:H TFT circuits in vehicle and mobile display panels.…”

Section: Introductionmentioning

confidence: 99%

A-Si TFT Integrated Gate Driver Workable at −40°C Using Bootstrapped Carry Signal

et al. 2022

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A thin-film transistors (TFTs) integrated gate driver which can work well at low temperature down to -40 • C is proposed and demonstrated. The carry signal (CN) of the driver, being generated through the voltage bootstrapping approach using a CN-connected capacitor, is used to pre-charge the following stage of the driver. As the rising and falling time of CN is much shorter than that of the gate driving signal GN, the bootstrapping voltage is increased and voltage loss of the pre-charge transistor can be much reduced, to avoid the driver's malfunction at low temperature. This structure further benefits maintaining the driving speed over long operation time at high temperature. On the other hand, the GN, instead of CN, is used to reset the gate driver to suppress the voltage feed-through effects. One single stage of the driver consists of 11 TFTs and 2 capacitors, driven by 4 clock signals with the duty ratio of 25%. An a-Si:H TFTs implemented single stage circuit of the driver occupies an area of 250 μm×1099 μm. Measurements show that the output voltage magnitude can be maintained well when temperature varies from -40 • C to 80 • C. Moreover, the rising-time and falling-time increase of the output pulse are both less than 3 μs after 240 hours of the accelerated high temperature aging operations.INDEX TERMS a-Si TFT; gate driver circuit; reliability; low temperature

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Section: Introductionmentioning

confidence: 99%

A-Si TFT Integrated Gate Driver Workable at −40°C Using Bootstrapped Carry Signal

et al. 2022

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“…Moon proposed a gate driver circuit based on low‐temperature polycrystalline silicon (LTPS) TFTs, which stores transfer charges at the gate electrode of driving transistor for touch detecting periods 6 . Although the touch reporting rate is up to 120 Hz, this circuit is not suitable to be implemented with a‐Si:H TFT, due to the threshold voltage shift (i.e., ΔV TH ) issues after long‐time voltage stress 7,8 . As ΔV TH of the driving transistors are different for touching/nontouching gate driver stages, there are nonuniformities in the output waveforms.…”

Section: Introductionmentioning

confidence: 99%

A compact gate driver with bifunctional capacitor for in‐cell touch mobile display

et al. 2021

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A thin‐film transistors (TFTs) integrated gate driver circuit with bifunctional capacitors for in‐cell touch with horizontal blanking display mode is proposed in this paper. The coupling capacitor, which conventionally enables low‐level‐maintaining parts in display periods, is reused to store transfer charges during touch detection periods. Consequently, only nine TFTs and two capacitors are used for a single stage of the proposed gate driver for in‐cell touch display. Furthermore, the bifunctional capacitor scheme not only avoids the driving TFT from long‐time voltage stress but also suppresses the transfer charges leakage effectively. Therefore, the variation ratios of rising/falling time between adjacent gate driver stages are suppressed within 6%. For a 5.7‐in. display with HD+ resolution, the layout of a single gate driver stage is 623 μm (width) × 171 μm (height). The proposed gate driver circuit has been prepared with the state‐of‐the‐art hydrogenated amorphous silicon (a‐Si:H) TFT manufacturing process. The measured results verified the circuit functions. The gate driver output waveforms are well maintained and being almost independent of touch detection time interval from 100 to 300 μs.

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“…Staggered bottom-gate is a prospective structure for the fabrication of a-IGZO TFT, which is generally used in conventional a-Si TFT [4]. Different with a-Si, a-IGZO is susceptible to plasma treatment and most metal etchants (acid).…”

Section: Introductionmentioning

confidence: 99%

24.5: Back‐Channel‐Etched a‐IGZO TFTs with TiO₂:Nb Protective Layer

Zhang

Zhou

Shao

et al. 2018

Symp Digest of Tech Papers

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A back‐channel‐etched (BCE) process for the fabrication of a‐IGZO TFTs is demonstrated, in which conductive TiO2:Nb (TNO) thin film is used to serve as protective layer for the a‐IGZO active layer. TNO film could excellently protect a‐IGZO due to its ultra‐small surface roughness. With treatment by N2O plasma + 200°C annealing, the conductive TNO can be converted into an insulator to serve as an in situ passivation layer. Besides, the TNO in the source—drain (S‐D) region remain conductive due to the protection of S‐D electrodes, which could be proved by the XPS results. Compare with the conventional device without TNO protective layer, the S‐D parasitic resistance (RSD) of devices with 1 nm and 5 nm TNO is significantly reduced. The positive bias stress stability is improved as well for the devices with TNO in situ passivation layer.

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Threshold Voltage Shift Effect of a-Si:H TFTs Under Bipolar Pulse Bias

Cited by 9 publications

References 25 publications

A-Si TFT Integrated Gate Driver Workable at −40°C Using Bootstrapped Carry Signal

A-Si TFT Integrated Gate Driver Workable at −40°C Using Bootstrapped Carry Signal

A compact gate driver with bifunctional capacitor for in‐cell touch mobile display

24.5: Back‐Channel‐Etched a‐IGZO TFTs with TiO₂:Nb Protective Layer

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Threshold Voltage Shift Effect of a-Si:H TFTs Under Bipolar Pulse Bias

Cited by 9 publications

References 25 publications

A-Si TFT Integrated Gate Driver Workable at −40°C Using Bootstrapped Carry Signal

A-Si TFT Integrated Gate Driver Workable at −40°C Using Bootstrapped Carry Signal

A compact gate driver with bifunctional capacitor for in‐cell touch mobile display

24.5: Back‐Channel‐Etched a‐IGZO TFTs with TiO2:Nb Protective Layer

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24.5: Back‐Channel‐Etched a‐IGZO TFTs with TiO₂:Nb Protective Layer