Three-dimensional interconnect analysis using partial element equivalent circuits

Heeb, H.; Ruehli, A.E.

doi:10.1109/81.199878

Cited by 172 publications

(49 citation statements)

References 16 publications

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“…The original SISO model is an order-480 DS describing a patch antenna structure with admittance parameter as its transfer function, which is obtained by partial element equivalent circuit (PEEC) method [36]. This PEEC model is nonpassive, which may be induced by poor meshing generation, inadequate numerical integration, matrix sparsification or inappropriate geometrical discretization [37].…”

Section: A Symmetric Admittance Peec Reduced Modelmentioning

confidence: 99%

Passivity Check of $S$-Parameter Descriptor Systems via $S$-Parameter Generalized Hamiltonian Methods

Zhang¹,

Wong²

2010

IEEE Trans. Adv. Packag.

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Section: A Symmetric Admittance Peec Reduced Modelmentioning

confidence: 99%

Passivity Check of $S$-Parameter Descriptor Systems via $S$-Parameter Generalized Hamiltonian Methods

Zhang¹,

Wong²

2010

IEEE Trans. Adv. Packag.

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“…The parasitic component of the PCB for sites X and Y are estimated from the geometric structure of the wiring in Fig. 1 (b), based on partial element equivalent circuit (PEEC) method [4], using the software Fast Henry [5], where the copper conductor on an FR4 dialetric board is assumed to be 0.5 mm wide and 0.035 mm thick.…”

Section: Modeling Parasitic Inductance In Power Conversion Circuit Wimentioning

confidence: 99%

The influence of parasitic components on power MOSFET switching operation in power conversion circuits

Funaki

Arioka

Hikihara

2009

IEICE Electron. Express

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This paper discusses the quantification of parasitic components inherent in printed circuit board (PCB) wiring, which can be of considerable value in power conversion circuits. The influence of parasitic inductance and mutual coupling are evaluated in terms of electromagnetic compatibility (EMC) for the switching operation of power MOSFETs in a dc-dc buck converter. The parasitic components are identified based on the partial element equivalent circuit (PEEC) method and modeled with circuit simulation. The estimated effect of the parasitic component on the switching operation of a power MOS-FET is validated by comparing it with experimental results. Keywords: switching, parasitic inductance, mutual coupling, EMC Classification: Electron devices, circuits, and systems References[1] Y. Fukumoto, T. Matsuishi, T. Kinoshita, O. Wada, Y. Toyota, and R.Koga, "Power current model of LSI and parameter identification for EMI simulation of digital PCBs," IEEE International Symposium on Electromagnetic Compatibility, 2001. EMC, 2001, vol. 2, pp. 1185-1190.[2] Y. Xiao, H. Shah, T. P. Chow, and R. J. Gutmann, "Analytical Modeling and Experimental Evaluation of Interconnect Parasitic Inductance on MOSFET Switching Characteristics," 19th Annual IEEE Applied Power Electronics Conference and Exposition, 2004. APEC'04, vol. 4, no. 1, pp. 516-521, 2004. [3] A. R. Hefner, R. Singh, J. Lai, D. Berning, S. Bouche, and C. Chapuy, "SiC power diodes provide breakthrough performance for a wide range of applications,"

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“…Our solver approximates the unknown currents and charges of a mixed surface and volume IE using piecewise constant basis functions [5], discretizes the IE with Galerkin procedures, and enforces current and voltage conservation with mesh analysis to generate a full-wave model:…”

Section: System Formulationmentioning

confidence: 99%

Segregation by primary phase factors: a full-wave algorithm for model order reduction

Klemas

Daniel

White

2005

Proceedings. 42nd Design Automation Conference, 2005.

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Existing Full-wave Model Order Reduction (FMOR) approaches are based on Expanded Taylor Series Approximations (ETAS) of the oscillatory full-wave system matrix. The accuracy of such approaches hinges on the worst case interaction distances, producing accurate models over a very narrow band of frequencies. In this paper we present Segregation by Primary Phase Factors (SPPF), a novel algorithm for FMOR enabling wideband interconnect impedance analysis. SPPF extracts exponential terms (primary phase factors) and then approximates the smoother remainder with an ETAS, thus resulting in good accuracies over a very wide band of frequencies. We also present a technique to improve conditioning for the required computation. Example results are given for simple interconnect structures modeled using a discretized mixed potential integral equation formulation.

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Three-dimensional interconnect analysis using partial element equivalent circuits

Cited by 172 publications

References 16 publications

Passivity Check of $S$-Parameter Descriptor Systems via $S$-Parameter Generalized Hamiltonian Methods

Passivity Check of $S$-Parameter Descriptor Systems via $S$-Parameter Generalized Hamiltonian Methods

The influence of parasitic components on power MOSFET switching operation in power conversion circuits

Segregation by primary phase factors: a full-wave algorithm for model order reduction

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