Thermo-Viscoelastic Analysis of Deflection in CSP Electronic Device Packages

Abstract

In the present paper, a deformation induced in a new bonding technology of chip-scale package (CSP) using resin encapsulation sheets is examined numerically and experimentally. Deflections after cooling from a bonding temperature are measured experimentally for various kinds of substrate and the thickness of an integrated circuit using a laser beam. In particular, a simple theory on the basis of a multilayered plate theory considering a viscoelastic property in the substrate is presented, and the thermo-viscoelastic analysis for the deflection of CSP is performed. Furthermore, the thermo-elastoplastic finite element method analysis is performed under the same temperature history. We could show that the simple formula for multilayered plates based on the thermo-viscoelatic theory can estimate fairly well the deflection of CSP in experiment.

Warpage mechanism analyses of strip panel type PBGA chip packaging

“…Despite the fact that the substrate exhibits viscoelastic behavior [8][9][10], it has been modeled mostly as elastic [7,[11][12][13]. The first numerical study on the bare chip warpage development with viscoelastic FR-4 consideration was investigated by Kim [10].…”

A Hamiltonian‐based analytical method for fracture analysis of linear thermo‐viscoelastic media

“…Thermo‐viscoelastic materials exhibit both time‐ and temperature‐dependent mechanical properties and have been widely used in modern industry, such as solid propellant grains , fiber‐reinforced thermoset polymer‐matrix composites , resin encapsulation sheets in chip‐scale package (CSP) . These materials are rheological materials whose responses are not only a function of the current input, but also of the current and past input history.…”