Thermal Cycle and Vibration/Drop Reliability of Area Array Package Assemblies

Abstract

SUMMARYCommercial off-the-shelf area array packaging (COTS AAP) technologies are considered for use in a number of high-reliability electronics systems. Understanding the process and quality assurance (QA) indicators for reliability, as well as developing methods to project life under thermal and mechanical environment, is important for the low-risk insertion of these newly available electronic packages. Extensive investigations were performed by NASA in collaboration with industry and universities to address key manufacturing and reliability issues on the continuously evolving AAP technology. The reliability results based on test data will facilitate use of various low-pitch and high-input/output (I/O) area array packages, with more processing power in a smaller board footprint. Topics discussed in this chapter are as follows:• Packaging technology trend for AAPs, including plastic ball grid array (PBGA), chipscale packages (CSPs), and 3D stack packages. • Summary of key parameters that affect assembly reliability of PBGAs and flip-chip BGA (FCBGA) based on a comprehensive literature search. The effect of a doublesided mirror image array package on solder joint reliability is also addressed. IPC 9701A specification was reviewed for lead-free solder alloy requirements. • Test results for a test vehicle having various packages including a PBGA with 1156 I/Os subjected to various thermal cycling. X-ray and scanning electron microscopy (SEM) and X-sections after thermal cycling. • Literature survey and test results for a COTS PBGA 676 I/O package assembly with various ball/solder alloys representing the current migration of industry to lead-free solders. A number of test vehicles, assembled and supplied by an engineering manufacturing service (EMS) company collaborator, were subjected to thermal cycling evaluation as part of collaboration activity. The test results are presented. • The test results for thermal cycling and vibration of numerous CSPs soldered with tin-lead and with and without underfill are presented. • Extensive vibration and thermal cycle data were generated by the consortium team members of the Joint Council on Aging Aircraft/Joint Group on Pollution Prevention (JCAA/JG-PP). Vibration test results for BGA 225 I/O package assemblies with tin-lead and lead-free solder were reviewed and compared with other models and 519

Dynamic response of electronic materials to impact loading: review

“…The published work that addresses the mechanical behavior and performance of tin‐lead and lead‐free BGA solder materials and interconnections, when subjected to thermal or dynamic loading, is enormous. In this section we will indicate just a few major publications that do not necessarily address board‐level testing per se (the next section will be devoted to this important field) and employ, in addition to experimental evaluations, also modeling techniques.…”

“…Shock and thermal cycling synergism effects were investigated by Ghaffarian , Tee et al. , Chiu et al.…”

“…In the review that follows we consider publications addressing the dynamic response of electronic materials to shocks and vibrations ; role, significance and attributes of predictive modeling ; the situations when it is sufficient to consider the deterministic (non‐deterministic) linear response and when nonlinear and probabilistic effects are significant and cannot be ignored. The emphasis of the review is on the reliability of solder joint interconnections and especially on the board‐level drop testing [–112] of solder materials and systems used as the second‐level of interconnections (package‐to‐substrate): printed circuit boards (PCBs) carrying surface mounted devices (SMDs). It is the board‐level drop testing that has become the most popular way to establish if, based on the existing qualification standards, the reliability of the second level of the interconnections is adequate.…”

Microelectronics packaging technology roadmaps, assembly reliability, and prognostics

“…R. Ghaffarian [5][6][7][8][9][10][11][12] has published extensive work on the subject of BGA, PBGA, CSP, FPGA, and CGA assembly and reliability and provided challenges associated with the area-array packaging technology implementation for high-reliability applications. The work has covered process optimization, assembly reliability characterization, and the use of inspection tools (including x-ray and optical microscopy) for quality control and damage detection due to environmental exposures.…”

Could application of column-grid-array (CGA) technology result in inelastic-strain-free state-of-stress in solder material?

“…In addition, BGA technology shortens signal delay. The long-term reliability of BGA systems is often insufficient, however, for many applications, and has been subject of numerous investigators [4][5][6][7][8][9][10][11][12][13][14][15][16][17]. Industry faces additional challenges with implementation of lead-free solder materials.…”