Thermal-aware task scheduling in 3D chip multiprocessor with real-time constrained workloads

Abstract

Chip multiprocessor (CMP) techniques have been implemented in embedded systems due to tremendous computation requirements. Three-dimension (3D) CMP architecture has been studied recently for integrating more functionalities and providing higher performance. The high temperature on chip is a critical issue for the 3D architecture. In this article, we propose an online thermal prediction model for 3D chips. Using this model, we propose novel task scheduling algorithms based on rotation scheduling to reduce the peak temperature on chip. We consider data dependencies, especially inter-iteration dependencies that are not well considered in most of the current thermal-aware task scheduling algorithms. Our simulation results show that our algorithms can efficiently reduce the peak temperature up to 8.1 • C.

Peak Temperature Minimization for Embedded Systems with DVS Transition Overhead Consideration

“…The peak temperatures are 89.9 ∘ and 84 ∘ for core 1 and 2, with iteration time 8 and voltage transition energy consumption 1 . Our approach reduces the peak temperature in core 2 by 1.6 ∘ , reduces iteration time by 1 and voltage transition energy consumption in core 2 by 1 . Figure 6.…”

“…For example, research shows that a 10 ∘ to 15 ∘ increase of operation temperature reduces the lifetime of a chip by half in average [1], [2].…”

“…Algorithm V 1. The ROSA algorithm Input: a DFG , different voltage levels, the retiming of , an initial schedule of , the rotation times , voltage transition energy consumption constraint…”

Thermal-aware task scheduling for peak temperature minimization under periodic constraint for 3D-MPSoCs

“…Therefore, it is of paramount importance to minimize the thermal problems throughout the design process. Researchers have paid extensive attention to mitigate thermal problems by considering several aspects such as liquid cooling [8], efficient thermal via placement [14], dynamic thermal management (DTM) [3], thermal-aware task allocation and scheduling [15,17], etc. However, the dynamic mechanisms, such as DTM or dynamic task allocation, lead to unpredictable behavior for the software execution, which might result in missed deadlines.…”

“…Most of the prior proposals for thermal management on 3D multi-cores focuses on independent tasks, including the thermal-ware task allocation, Dynamic Voltage/Frequency Scaling (DVFS), clock gating and hot task migration [3,17,19,22]. Recently, there has been focus on the connected tasks described as dataflow graphs, e.g., Directed Acyclic Graphs (DAGs) [5,11,15]. In these works, optimizations are performed considering both thermal issues and communication overhead.…”